How to post in linkedin sir after completing this nand tutorial, and what are the major points we are highlighted and it's(analog and digital both we are mentioned..?) on the linkedin platform I'm confused ..?? Could you tell me sir..? Some major highlighting points...!!
@@dr.hariprasadnaikbhattu Hi, thanks for the reply! Could you tell me one more thing about the 4-input NAND, how to correctly set the width of the transistors or perhaps some other parameters in order to get the following results at the output: Outlet capacity
sir i tried but in the end its showing "spectre terminated prematurely due to fatal error." what's the solution
Hi, check for the error in the log
Window and resolve
Thank you sir
one of the excellent video which is very useful.Thnk u sir❤❤❤❤❤❤
Thanks a lot for your response
Thank you so much sir for the detailed explanation with color visualization in the output...
☺
Hi, you are welcome
Very good explanation sir, really u nailed it 👏👏
Thanks and Welcome
Really very educational video. Thank you.
Thanks and welcome
How to post in linkedin sir after completing this nand tutorial, and what are the major points we are highlighted and it's(analog and digital both we are mentioned..?) on the linkedin platform I'm confused ..?? Could you tell me sir..? Some major highlighting points...!!
Hi, are asking about the video.
If you have created use the web post. your youtube link to post on linked in
@@dr.hariprasadnaikbhattu no sir I'm just posting photos for the results..!! All in linkedin like PDF..,,
Sir I am getting distorted output how to solve it
Hi, check you have provided input and vdd properly.
How to make rise time and fall time are equal if the condition given in the LAB, NAND schematic
Hi, Are you asking about output
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Sir can you u please send me the specifications of this? I needed it for my mini project
Hi, what do you mean by specification. It is just a NAND gate with four transistor with default values.
Sir this simulation is which technology??
Hi, Simulation is done in gpdk 90nm CMOS technology.
@@dr.hariprasadnaikbhattu sir I tried in 90nm and 45nm but wave form plots I didn't get.
hello sir did you can help how to design 3bit alu
with A*B, A+B, A-B and AxorB operation c1c0
Follow the nand / nor / ex-or gates design tutorial.
Thank you very much sir, can you upload the video to do simulation of netlist.v file using nclaunch which is generated in synthesis process.
Thanks a lot
I will do with nclaunch
How to correctly build a 4-input NAND gate?🤔
Hi, add another two PMOS in parallel and 2 NMOS transistors in series to the existing.
@@dr.hariprasadnaikbhattu Hi, thanks for the reply! Could you tell me one more thing about the 4-input NAND, how to correctly set the width of the transistors or perhaps some other parameters in order to get the following results at the output:
Outlet capacity
very good video, thank you sir
Thanks 🙏
how to design multiple design
Design individual schematic. Create the symbol. Then bring the any number of symbols to the new design.
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Thank you
very helpfull sir tku
Appreciate for your response
very easy to understand
Thank you so much
Thank you sir 😀
Most welcome
graph is like noise signal
Hi, check you have provided the Vdc and gnd. Also check the voltages of pulse source where you gave V V twice while declaring the V1 and V2.
Thank you sir🎉
Thanks for Response