How to create a Tcl-driven VHDL testbench

This video shows you how to create a Tcl-driven testbench for a VHDL module in ModelSim.
Read more and download the code from:
vhdlwhiz.com/tcl-driven-testb...

[@bourbajoollof4232]

A lot of thanks, you help me a lot to understand how to menage a vhdl Simulation-Testbench with tcl File. You do a great job. Greettings from Germany.

[@VHDLwhiz]

Thanks. That's great to hear!

[@krishnavs1082]

thank you sir for the upload

[@VitorStraggiotti]

Very good video.

[@aymen_dh2499]

thx for all your videos. I would like a video about how to use an lcd screen with vhdl code.

[@diegogarridomendoza2828]

Hi Johan. Can I use Vivado and its TCL console to drive this testbench?

[@VHDLwhiz]

You can do the same with Vivado but the Tcl commands will be different. It's one of the drawbacks compared to VHDL testbenches. Different tools have different commands.