9.22. Coding state machines in VHDL

Once you have a paper design for a state machine, coding it in HDL can be challenging. However, there is a method through which the controller can be faithfully transferred to hardware.

[@keyvanshahin1740]

does it not make more sense to combine the next state process and output process? they are both combinational with a Case statement on the current state. looks pretty easy and logical to combine.

[@Egosumali]

Where can i find this code