This is one of the best digital logic classes I've taken! Using it as a review but wish it had existed the first time I went though this material! Thank you!
I really love the glass plate method as a chalkboard. I suspect it's flipped horizontally, although I wish to keep imagining someone being able to write in mirror-script with such skill. :) I also learned what the mistake was in my design by the way. Used a counter and forgot that at reset there is no (clocked) state 0 at reset. And... I need to watch earlier episodes, lost you at the rectangles to get to the expression.
COMMENT: Using S1, S2 to denote the memory output to the gates confuses the schematic diagram Eliminate confusion by using M1, M2 to denote the memory output.
This is one of the best digital logic classes I've taken! Using it as a review but wish it had existed the first time I went though this material! Thank you!
You are the best !!!Never understood anything about FSM until I watched your video!! Be blessed and I hope good energy comes your way!!!
one of the best class in the internet
DUDE!!!!! So happy I stumbled on to your channel… Thank you so much for sharing your knowledge in a way that is easily understandable!!!!
Thank you, very lucid explanations!!!
You are welcome!
I really love the glass plate method as a chalkboard. I suspect it's flipped horizontally, although I wish to keep imagining someone being able to write in mirror-script with such skill. :) I also learned what the mistake was in my design by the way. Used a counter and forgot that at reset there is no (clocked) state 0 at reset. And... I need to watch earlier episodes, lost you at the rectangles to get to the expression.
Thank you sir, your teaching style is easy and informative that any one can understand concept
A very good session. His example made it more interesting and easy to understand, Thank you sir!
excellent sir , i missed my exam , we get this in .........so next time i will ready for complicated issues
thank you so much, you help me a lot with my homework :'D
such a great explanation. thanks lot
COMMENT: Using S1, S2 to denote the memory output to the gates confuses the
schematic diagram
Eliminate confusion by using M1, M2 to denote the memory output.
hi, can you teach how to produce the verilog code using this? thankyou
I like your last look at this video. it means do you get it right !
You seems very Canadian