PLL's - Digital phase detectors

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  • เผยแพร่เมื่อ 12 ม.ค. 2025

ความคิดเห็น • 54

  • @Loomes32
    @Loomes32 25 วันที่ผ่านมา

    Friendship ended with type-1 pfd, now type-2 pfd is my best friend.)
    Thank you for explanation and especially for visual demonstration!

  • @00xero
    @00xero 2 ปีที่แล้ว +6

    This is a really, really good video man. I've dealt with PLLs at work but always as a mysterious black box that somehow keeps track of time and I never really understood them. It just so happens I've been researching QAM/OFDMA in order to figure out some symbol rate schenanigans, and I got to wondering how they actually detect phase in the first place. Which led me down the rabbit hole and to your video. Now the circle is complete :)

    • @CatFish107
      @CatFish107 ปีที่แล้ว

      That's interesting! I'm coming at it with similar curiosity of "how's this magic box doing this?" But from eurorack synthesizer modules. A PLL is one of the best "strange tones for low cost", unconventional modules available.

  • @domtom128
    @domtom128 3 ปีที่แล้ว +8

    An excellent introduction to PLLs and nice practical demonstration of (digital) phase detectors! I hope we'll see a video about VCOs as well :). Also, a great continuation of this topic are "charge-pump" PLLs, which are more popular in integrated circuits.

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว +5

      I do plan on continuing to make PLL related videos, first look at the other components and implementations, like VCO's; and then look at final use cases.

    • @shubhamnayak9369
      @shubhamnayak9369 3 ปีที่แล้ว +3

      costas loop as well

  • @Scrogan
    @Scrogan 3 ปีที่แล้ว +3

    Now I understand how a type-2 phase comparator works
    It’s really good
    No more XOR gate for my planned modular synth
    PLLs are cool

  • @Scrogan
    @Scrogan 3 ปีที่แล้ว +1

    Oh and also note that PLLs can lock onto higher and lower frequencies with a type-1 phase detector. If there’s some relationship like f/2 or 3f/5 or something that causes the output signal of the phase comparator to repeat, then it’s a stable configuration for the PLL itself. This means if the rest frequency of the VCO is more than ~1.6 times the input frequency (ideally it’s a factor of 2), it won’t lock on that frequency but on a harmonic of it. Probably fine for FM radio, but for AM radio or audio purposes, this is a deal-breaker. I’ll have to see how the type-2 sims.
    Also neat function generator.

  • @paulp1204
    @paulp1204 3 ปีที่แล้ว +1

    Really nicely presented comparison, thank you Fesz

  • @alexengineering3754
    @alexengineering3754 3 ปีที่แล้ว

    Interesting topic. I hope you make also a video with a complete ppl in the Future. Thanks a lot.

  • @saeed6296
    @saeed6296 2 ปีที่แล้ว +1

    very nice explanation 👌

  • @p_mouse8676
    @p_mouse8676 3 ปีที่แล้ว

    The fun thing with XOR ports is that one could make a PWM signal/generator by changing the phase or delay of the signal.
    You could even use sine waves as inputs.

    • @alexlo7708
      @alexlo7708 3 ปีที่แล้ว

      Contradictory ,most people uses PWM in create pseudo sine wave instead.

  • @NishantjonyJaiswal
    @NishantjonyJaiswal 3 ปีที่แล้ว +8

    Earthquake 6:06😱

  • @cyberphox1
    @cyberphox1 2 ปีที่แล้ว

    Your videos are outstanding.

  • @arthurcampos7290
    @arthurcampos7290 ปีที่แล้ว

    thank you very much, i used your osciloscope views for my graduation work

  • @CAXRAMEDIA
    @CAXRAMEDIA 3 ปีที่แล้ว

    We love this video. Good job, sir!

  • @servidorteleco8916
    @servidorteleco8916 3 ปีที่แล้ว +3

    Excelent video. Love the blackboard revelion part. Lmao

  • @jagjordi
    @jagjordi 2 ปีที่แล้ว +1

    Very nice video!

  • @fiveangle
    @fiveangle 2 ปีที่แล้ว

    I'm having a tough time getting my phase detectors working as I don't think I'm modeling the "board falls down" correctly in LTSpice

  • @souravece24
    @souravece24 3 ปีที่แล้ว

    I have some doubts about simulating transformer in LTSPICE. Primary voltage is rectangular waveform of 25Khz and 30% duty cycle. But when coefficient of coupling is less than 1, output waveform is not rectangular. It is converging to 3V. I want to know what is model of transformer in LTSPICE?

  • @izzygal673
    @izzygal673 2 ปีที่แล้ว

    Thank you. Great video

  • @bobdoritique7347
    @bobdoritique7347 2 ปีที่แล้ว +1

    Merci! Very interesting.

  • @mu8502
    @mu8502 3 ปีที่แล้ว

    hey my friend I need to make a square signal that have not any small changes in frequency or pulse width but ics like 555 timer can not be like that and have small changes is there any way???

  • @abderazakcherfi
    @abderazakcherfi ปีที่แล้ว

    Hello,
    I have built the same circuit of the PFD, but I had some errors and I couldn't simulate the Ckt, the error is "small size step"
    What's the problem cz am beginner with LTspice, Can u help me here?

  • @شريفشريف-م7ظ
    @شريفشريف-م7ظ 9 หลายเดือนก่อน

    Does it mean that the second type phase detector can detect only 5 angles 0,90,180,270,360 so if i need a detector that have 180 steps from 0 to 180 degrees which means he can read the shift degree by degree and gives me a reading on 25° different from 36° for example what to do please any one help

  • @p_mouse8676
    @p_mouse8676 3 ปีที่แล้ว

    Nice video! 👍🏻
    Btw, there are ideal filter blocks available for Ltspice. They work so much more convenient, especially the higher order ones (including highpass, bandpass etc).

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว +2

      Is this filter a default component in LTspice or is it a component that needs to be imported?

    • @Tikorous
      @Tikorous 3 ปีที่แล้ว

      @@FesZElectronics default, might have been added in a recent update

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว +2

      I just noticed the warning that I haven't performed the updated in ~500days; more than half an hour later I remembered why I don't perform those updates.
      Anyway, I noticed the "Filter Products" category, that contains various IC's. Was this it?

    • @p_mouse8676
      @p_mouse8676 3 ปีที่แล้ว +2

      @@FesZElectronics yes, updating always takes very long. The filters are in the SpecialFunctions category. But I really can't remember if it's by default or some kind of extra (I always just copy the whole folder to a new system). I will have a look for you :)

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว +2

      I found them now! These are default, but they came in a "recent" update (sometime in the last 500 days). Thank you for telling me about them, I will study them in more detail.

  • @giorgitsintsadze9919
    @giorgitsintsadze9919 6 หลายเดือนก่อน

    This is what I do not get. In Type I detector, when everything is aligned, you get 0 volts after low pass filter, basically putting VCO control voltage at 0 volts. How does this not revert VCO output frequency corresponding to ground and subsequently losing lock (given that input frequency is achieved at some non-zero control voltage)

  • @iblesbosuok
    @iblesbosuok 3 ปีที่แล้ว

    Elektor's 303 circuits.
    Remind me to Garth Nash' Application Note 535

  • @yourajbadgujar7837
    @yourajbadgujar7837 3 ปีที่แล้ว

    sir, which is useful in analog phase detection from audio mp3 files.
    like arduino etc.

  • @ajingolk7716
    @ajingolk7716 ปีที่แล้ว

    Capture range and Lock range?

  • @irfanmajid4772
    @irfanmajid4772 3 ปีที่แล้ว

    If you could please let me know which circuit simulator you have used for simulating CD4046B PLL

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว

      I did not perform any simulations with the CD4046; I just built the circuits I showed from the basic logic gate building blocks found in LTspice.

    • @irfanmajid4772
      @irfanmajid4772 3 ปีที่แล้ว

      @@FesZElectronics Thanks

  • @MrAshwindersingh
    @MrAshwindersingh ปีที่แล้ว

    Type two having issue pc3 is keep fluctuating

  • @Chicken_Massacre
    @Chicken_Massacre 3 ปีที่แล้ว

    I love combining knowledge into not so many words... So!
    The stable crystal oscillator's sine wave is made to a stable voltage. Another voltage is fed to a voltage controlled oscillator who's function is affected by user voltage input and desired output frequency. To check if the desirable function is in phase, the multiplied function is divided to the base sine and compared?
    I need someone to check the validity of my statement.

  • @arturomartes8696
    @arturomartes8696 3 ปีที่แล้ว

    Fesz for President!

  • @SaihoS1
    @SaihoS1 3 ปีที่แล้ว

    8:51 Sorry you call these D-type triggers, but they don't have a D input. Perhaps you should connect D and inverse Q on each flip-flop?

    • @SaihoS1
      @SaihoS1 3 ปีที่แล้ว

      I see that in LTSpice you have connected D-inputs to logic 1. This is definitely better.

    • @FesZElectronics
      @FesZElectronics  3 ปีที่แล้ว +1

      I guess I didn't add the "D" input to keep the schematic simple, but this is a valid point - its important to see that input connection to get the circuit to work correctly.

  • @mejoe444
    @mejoe444 5 หลายเดือนก่อน

    Hello, I'm confused why the XOR based PLL locks when there is 90 degree phase shift between input and output. In other words, why locking occurs at half the voltage? What decides that?

  • @R2AUK
    @R2AUK 3 ปีที่แล้ว

    👍❤️

  • @ahmednor5806
    @ahmednor5806 หลายเดือนก่อน

    💐💐

  • @Red_bone
    @Red_bone 10 หลายเดือนก่อน

    damn, this video was good

  • @yasserhaddou5393
    @yasserhaddou5393 ปีที่แล้ว

    when the board faal down 😂😂

  • @depressivepumpkin7312
    @depressivepumpkin7312 3 ปีที่แล้ว +1

    nice shirt

  • @Loomes32
    @Loomes32 25 วันที่ผ่านมา

    Friendship ended with type-1 pfd, now type-2 pfd is my best friend.)
    Thank you for explanation and especially for visual demonstration!