Introduction to FPGA Part 9 - Phase-Locked Loop (PLL) and Glitches | Digi-Key Electronics

[@pratiksharma4238]

Thank you for such videos .. Digikey is doing great for the community. !

[@233kosta]

The awkward moment when my "good enough" 50MHz scope isn't quite good enough any more 😂

[@candidmoe8741]

How fast can you run the ICE40? Why 120 MHz and not 240 MHz?

[@johncutler5995]

Thanks Important info to know, but I'm starting to wonder if FPGA's are ultimately going to be too advanced for what's left of my 72 year old retired, hobbyist mind}

[@saturdaysequalsyouth]

Don't look at the latest Xilinx parts then :)

[@emillyboschen6012]

as a ee student i feel like i dont even used 2% of it potencial

[@TinLethax]

Sadly my LP1K BGA 36 package doesn't come with PLL.

[@csqgb9801]

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