How to use a Function in VHDL

Functions are a type of subprogam in VHDL which can be used to avoid repeating code.
The blog post for this video:
vhdlwhiz.com/f...
In VHDL, functions always return a value. They can take any number of parameters as inputs. Function parameters behave like constant inputs. They cannot be changed inside of the function. Parameters may be given a default value in the function declaration. The default value is used if nothing is assigned to the parameter when the function is called.
A function call always consume zero time. Therefore, Wait statements cannot be used within a function.
There is a declarative region between "is" and "begin" keyword in the function declaration. Here, variables, constants, and even other functions can be declared. Objects declared in the declarative region are scoped to the function, meaning that they do not exist outside of it.

[@Dustycircuit]

Thank you for taking you're time to make all these wonderful tutorials!

[@philiphubbe9725]

Very straightforward.

[@shaizohar4258]

this wonderful tutorials really helpfull thx

[@mastroscala]

So functions are just used to make the life easier in "compilation time", they aren't translated in hardware, so they can have only static inputs (like constants). Am I right?
Thank you for the videos

[@VHDLwhiz]

Not entirely correct. You can assign signals or variables to function parameters as well, not only constants. But inside of the function, the parameters behave like constants. You can't change them inside of the function, and you can't send values out of the function through the parameter list. Use the 'return' keyword for that.

[@mingshengyin1936]

Great thanks!