Practical RF Hardware and PCB Design Tips - Phil's Lab #19
ฝัง
- เผยแพร่เมื่อ 28 พ.ค. 2024
- Some tips for when designing hardware and PCBs with simple RF sections and components. These concepts have aided me well when designing 4-layer embedded systems PCBs.
Topics: critical trace lengths, stackups, controlled impedance traces (microstrip, stripline), impedance discontinuities due to wide pads, clearances, bias tees.
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[TIMESTAMPS]
00:00 Introduction
00:27 JLCPCB
00:53 Overview
02:08 Critical length
06:45 Stackup
08:51 Controlled impedance traces
12:34 Impedance discontinuities (pad-to-trace)
14:34 Clearance
15:17 Antenna bias tees
ID: QIBvbJtYjWuHiTG0uCoK - วิทยาศาสตร์และเทคโนโลยี
JLCPCB adding connectors is actually a really cool thing!
Simply Awesome. Sharing knowledge with the world makes your channel Awesome. One of the youtube gems.
I've been looking for a video explaining this content for 3 years now! Thank you
This video is really really good. Your videos give me a lot of confidence to design my own boards. Thank you!
What a great, concise guide to working with RF. A fair amount of this happened to be review for me, but the bit near the end about estimating the inductor value on the tee was a facepalm moment for me, as I realized an LTE design I'm working on could have been - and now will be - simpler and cleaner. Totally makes sense. Thanks.
Your videos are so helpful and well made - really appreciate the time you put into this. So, THANKS!
KiCAD RF tools is a great plugin for RF designs. Thanks for the video Phil!
Phil’s lab made me wants to create my own lab
I did made my own workstation finally!
Damn, that true
When you just said according to Rick Hartley i knew that you are so professional.
Thank you for this guidelines for RF design such an amazing content
Thank you very much for this and for sharing your experience!! You are gold
Thank you very much, Paul!
Great video! I've done a bit of research on trace discontinuities, and in an article published by Minicircuits, trace/pad discontinuities can impact your VSWR. One solution is to reduce the size of your pad, though this may make soldering a bit more difficult. I'm dealing with VSWR and insertion loss issues on a design I'm working on.
Thank you.
Thank you for watching!
My favorite 4-layer board stack-up is (SIG/PWR, GND, GND, SIG/PWR). I've learned this also from Rick Hartley.
Great video, thanks!
Great video Brother. Waiting for your PCB course.
Thank you...
Component pads with rounded corners are also usually available to smooth out impedance mismatches between traces and pads.
Amazingly clear and practical tips!
Please do the same for the ESD design. I am very curious how to handle that properly.
Nice am always eager to watch your videos , ur efforts are much appreciated 💪
Incredibly good video, very helpful. Thanks a lot Phil!
Thank you very much, Jairo!
I didn't saw your last 3 videos! Tomorrow I shoul take a popcorn and lay down!
Great video as always. Thank you!
Hi Phil, coming Monday I start my graduation assignment at a company. The assignment is designing a PCB and writing its firmware. I have to say that your videos really are a treat and are great for refreshing my knowledge!
Also, KiCad 6 is almost releasing! In case you didn't know.
Where are you study(?)
It's still almost released
Great video... As always ! Keep going !
Love your content. I wish, I can use this knowledge for my project, practically. Unfortunately, struggle is always time and resources .. economic or otherwise.
Outstanding video! Thank you.
Really good video, greatly explained!
Your videos are gold, gonna share it on my discord, keep up the amazing work, saludos de Chile :)
Thank you so much, greetings from Denmark :)
Looking forward to seeing a video of the design of this board.
Thank you, that's soon to come!
Thank you! So much helpful information and really well structured. I have a question about trace length. You calculated that it should be less than than 8.6 mm and it was ~7. But what about the length of the anténa connector, connections in the anténa, ic leads/wire bonds. I suppose it could sum up and add quite a bit of length to the trace. Why it's not taken into account?
I mean could it affect my requirements on the impedance/length of the trace
Very nice! Keep up the good work!
Hey Phil, great video! Would you please consider making another one about making PCB antennas design (in KiCad) and choosing values for the PI matching network, and various types of PI networks. Like for example the EPS32 PCB antennas... That would be great!
Matching networks would be a great video. Including, for example, how the critical length comes in to play, best practice for tuning, measurement etc.
Thank you!
Yeah I think a video on PCB antennae and matching networks would be a very good idea. I need to get my hands on some simulation software before I'll put one out, but hopefully sometime soon :)
Antenna design, beyond the most simple ones, is a big job. Simulation software is hideously expensive, and those who design antennae are usually very specialized in this field.
For WiFi, GPS, and cell bands there are numerous choices available, with predictable characteristics, including PCB mounted ones.
"Critical length" is applicable to digital signals, where their risetime determine frequency calculations. For RF 50 ohm lines is commonly used, and better dielectrics for lower losses, but expect a 10x cost increase for use above like 3 GHz, or very high power levels.
great video!!, thank you for shearing. Have just little question, what do you do in the xtal section with the ground plane? i see like a small cut and one line conection, can you explain me? thanx!!
Great video as always
Phil, thanks so much for putting out these quick modules on specific categories. These are so informative to watch and I pick up so much additional info outside of the intended subject.
My question to you is, what would you recommend for a semi-structured course of study outside of a university? I'm currently working on a BS in computer science but I am just as interested in electrical engineering and embedded systems. I am thinking I would like to get a head start on these other areas of expertise in case I decide to pursue multiple degrees after I finish CS.
Very great video, thanks 👍
Great video, congrats.
Could you talk more about designs in which the RF signal is over than critical length?
What layout guidelines I could implement to do a better design.
Thanks
Really nice video :)
at 14:22, could we not use tear drops to make the width transition gradual ?
Very useful movie. Thanks
😍 my search is completed here 😁
Hi! Great channel! I've learned so much here. I have a question. I am designing a pcb that has a rf module using a 868 mhz antenna. The pcb will have 2 layers, both layers with ground fill. Are the calculations done the same way?
Great video Phil,
Can you do an introductory video to the RF design for non-RF engineers in the future? it will be really interesting.
Tnx for nice teaching.
Excellent video!
really helpful content which encourages to learn more about hw design.
what about your hw course? when will you release?
Great videos! What happened to the PCB design course is it available for purchase yet?
Amazing. Keep spitting truth, don't swallow.
Good news about jlcpcb! Good video and exactly what need. Can you recommend active or passive antennas for GPS?
Good channel , I hope you get more subscribers bro !!
Interesting tips .. thanks
Nice video. No stitching vias? (To isolate the RF part.)
Great explaination!
Thank you!
Hi, I have a little question. I'm about to design a circuit that includes nrf24 ic. I would like to do this on 2 layers, 1.6mm board, as it is a little bit cheaper and easier to design. But when I enter all values into the calculator (1.5mm height between ground and traces, 4.6 dielectric constant, and 50-ohm impedance), it gives me enormous 2.54mm width traces. Is that possible or am I doing something wrong?
Great as always.....Greetings from Africa!
Thank you, Usama!
Hey if we are using some rf module like the DWM1000 do we still need 4 layers? As the rf part is handled by the module itself and we only have to add microcontroller and other components, can it be done in 2 layers? Or you still suggest 4 layers? Also could you make on such video for design consisting dwm1000 or a similar module.
Best channel on youtube
Phil i have problem with easyeda i need some support for imported component will be not linked on pcb when i start to route
Can you suggest any playlist for learning smt32 blue pill tutorials
Can we connect ufl directly attach to pin with trace length around 2mm. making 4 layer board for 1 trace is too overkill!
If you want to play around with cheap circuit simulation, try Qucs, that should get you a reasonable answer already. Looking at the output from the KiCAD calculator it also shows the Eeff, I guess that differences in approximating that value are to blame for the different values you got from the JLC calculator.
Great video
Thanks Phil
You should remove the solder mask to properly make the microstrip. Another option is to include the dielectric of the solder mask. It is still a good video.
Would using a wider trace (say 0.5mm) width negatively impact the impedance?
Fuck yeah it’s Phil
Thanks again.
Sir, I need help in designing 2.4 ghz RF circuit. I need to decide my antenna trace width for pcb antenna. Dielectric constant 4.5
Which is used in military applications most a microcontroller or a FPGA? Also which is used critical applications?
Hey Phil, May be you will use Ublock Origin instead of ADB. ADB lost its trust as a proper add blocker a while ago. You may search online for differences.
hello, i'm a bit late to the party (by about 7 months!) but i have a question. i'm going to do a layout for a board where a microcontroller communicates with a bluetooth module over uart. do the uart traces count as rf traces?
If I understood you correctly, you recommend routing signals on the top layer. May i ask, what´s the benefit compared to a setup of lets say: 1.Power 2.ground 3.signal 4.ground, where the signals would be mostly shielded against the outside noise?
Ps: as always, i think your videos are a great resource both for beginners and advanced users. They guide and encourage people to improve EMC for common application boards.
A big disadvantage of the stackup you mentioned is that you lose an entire routing layer. This also only minimally protects the traces from external EMI but your components still have to be on the outside layers and are still just as susceptible to the EMI. Most general applications don't really need this kind of protection, and if they do, you use shielding cans instead. Although many HDI designs use this sort stackup you mentioned but only because they have many layers and don't have a problem with routing constraints, and it is done mostly to prevent the board itself from radiating RF energy to remain within compliance standards not just from protecting it from external EMI.
Thank you Phil's Lab!!!
Could you allow subtitles?
Thanks!
Hello Phil! I hope you'll notice my comment, because I'm losing my mind here. I have a question about usb connection in stm32f1 mcu's. I've watched your video about stm32f1 breakout board and designed own board based on your schematic. I wanted to play around with virtual com port and establish connection with my pc. But when I connect my board, I get "device descriptor request failed" error. And after some research I found that in some cases D+ line is connected to 5v instead of 3.3v. I resoldered the pin, and usb started working and I can communicate with mcu. I just can't understand what I'm doing wrong. All of the official docs said it should be connected to 3.3v, but it just doesn't work. I assume it's software problem, because it's working now with 5v pull up. But I simply couldn't find the answer. Please give me a hint if you can. And thank you for your videos, they keep me motivated)
i have no idea what words you say means , but its so fun to watch 😅
I'm glad it's at least fun to watch :D
Hope you build one video of flight control design
What to do if you exceed the critical length?
Fantastic!
Thank you!
Great video. Could you please make one about higher power pcbs, i am trying to build a shield for my micro that could handle a 12S bms (BQ76952) and that could feed its energy to a 3 phase gate driver (DRV8353) for motor control at 60v 15a. I am confused about trace width and their power carrying characteristics. Thanks big fan.
Thank you! Yeah I'm definitely up for making a video on higher-current/high-power PCBs. Not sure when that'll come out, but it's on the list :)
awesome!!
Thank you!
Amazing!!!
Thank you, Hardik!
excellent
Thanks!
Thak you!
I'm just a hobbyist with no commercial experience in board design. I watched those videos from Rick Hartley and as you stated you even took part. Could you please explain why you still insist on using layer 3 for power on a 4 layer board? Since it is what Rick Hartley wouldn't recommend. Also layer 2 and 3 are much thinner than layer 1 and 4.
hi sir .plese your helping
haw tomake RF recever circuit at home .
ihave a new projact .i have to get it done plese your helping
Thx
good
Don't tell Rick you're using a 4 layer stackup ;-)
Hi please make a course for this video
this is one of the best channels on youtube, but there's something wrong with the audio in this video. the volume level is modulating to the point of being unlistenable.
I did not notice any audio issues and was able to follow along just fine. Maybe a local issue rather than with the video?
Thank you! Hmm I'm not sure if I can hear the audio problem. I notice that the noise gate can sometimes make it sound funny. I'll try to improve it for future videos.
jlcpcb down????
👍
Phil's Lab videos make we want to strip down and get frisky.
jlcpcb upwards direction????
Phlab club is in effect effective of this previous Tuesday for meeting, will you have a new content on the xtal section in time?
Great video as usual
Great video!