Current Mirror Layout - English Version
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- เผยแพร่เมื่อ 19 ก.ย. 2024
- This video contain Current Mirror Layout in English, for basic Electronics & VLSI engineers.as per my knowledge i shared the details in English.
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Thanks a lot, Sir ... You are trying to help lots of students by providing the best Analog layout design contents 🙏
You are giving me very valuable information, that is fanstastic!!!!, thank you very much
Thx buddy
It is really very useful, Thank you sir for explaining Current mirror.
Good explanation with practical sir
I think the layout will be easier if you don't use the multiplier and just fingers since you are merging the diffusions anyway.
Can you please made a video which explains ... only "SHORTCUTS in CADENCE LAYOUT"
Do it as soon as possible...
sure ...
the layout that you are doing is for understanding how it is connected...but if you take all theoretical concepts consideration then you do it in a different way right?
Ofcourse , we have calculat em / ir / signal integratity so on ... Every thg we have consider before routing
Very nice video. Can you please make a video of CM with the common centroid method? Thanks in advance.
do you already have videos for modgen for CM and DIFF PAIR? and also video for mpp for creating shields? thanks for the video :-)
Sir in the current mirror circuit, gate and source has been shorted. It should be gate and drain. Anyways splendid work sir. Helpful
It's not a real time circuit , jusr a example , so Conny the terminal in a proper way or which is correct .
Doesn't matter, MOSFET is bidirectional. Simulate it and you will see it works!
Could you explain why diode connected transistor in current mirror sit in between and other devices side by side. Means you have done the AABBAA. BB= diode connected.
From that diode only current is mirroring , so only always we have keep diode middle ....
Awesome.thanks so much sir
Sir how did you say BBAABB is the best matching.There will be a other possibilities also for matching.
as a layout engineer , we cant able say the best pattern , we will get the pattern from circuit design engineer based on that we have do matching , here for E.g i said aabbaa is the best pattern
For current mirror , we use common centroid matching , why interdigitization was done in this video?
This is common centroid too. Both A and B have the same common point.
Sir could you share how to layout the cuurent bias of "folded cascode amp" ?
Sir, how are you saying Drain and source should be merged? I don't get that part, please reply.
Mention the time spot, where I've mentioned
@5:20 sir
Thank you for the awesome video. It really helped me a lot. I was just wondering about all the bodies for mosfets from that current mirror. Is it okay not to generate and route body for every individual mosfet?
Have to generate manually
Super Sir
how can we draw layout of current mirror in interdigitation matching if we have multiplier = 1 and fingures = 4 ... and what is the matching pattern ?
How will design current mirror with only 1 device ? We need min 2 devices
can you please explain why not to use common centroid pattern for current mirror ?
You can use
This is also current mirror since the middle point of both devices are at the center.
thanks
nice
sir do some lecture on floor planning matching
analog floor plan or physical design floor-plan
@@analoglayout floor plan
sir match the transistor when you have only schematic
sure
Is this 180 nm technology?
65tsmc RF
@@analoglayout Thank you
complete nonsense schematic
I'm not a circuit designer .... Anyway
Can you please made a video which explains ... only "SHORTCUTS in CADENCE LAYOUT"
Do it as soon as possible...