Great explanation. Hope to someday see you add to your channel. There is a surprisingly low amount of online resources on these topics. Thank you for your contribution
There is a load here ummm circuitry here 😂😂, I like the way you trying make it more simpler and simpler, this is what we need from lecturers before using a technical term, lecturers need to make the students understand what it's meant for
I have a question, in my graduation project we are asked to put current mirror load to test load variations across corners, how to put this current mirror at Vout of a switched cap circuit to test load variations?
we will use current dac.. there we will use...sometimes in some corners, the gain of amplifier may reduce/increase...in order to get back the desired condition, we will use it. there are many places where we use it. the current will be controlled by digital bits like 4bit control or 6bit control etc.
Sir stick to one explanation that due to Vgs current is drawn.In cascode you explained that I is drawn and that sets the vgs .People might get confused.I believe you understand that in electronics and Electrical its the I which is dependent not the V.
No...that's the point... Bottom transistor vgs sets the current... So cascode transistor vgs cannot again set the current... Please go thru again...it's a important concept...not easy to comprehend... Hope its clear
interdigitized matching should be fine for current mirror..bcos the current that we mirror itself will have 20% variation.... generally it will be PTAT current....that we use everywhere...from the BGR
@@analoglayoutdesign2342 Could you please elaborate on the above statement ? Does this means ,if we are mirroring a 50uA current the mirrored branch can vary up to 60uA (20%) as worst case?
@@Gkcptplm ..not thats not the meaning...your reference current ie. 50uA itself varies from 50uA to 60uA... generally we will have a PTAT current from BGR.. that will be used for biasing all blocks... so it varies for sure by that percentage....hope I answered...but however if the reference current itself is very accurate like in case of LED drivers etc, then current mirrors can be common centroid or cross coupled, meaning you match it in both x & Y
@@analoglayoutdesign2342 How is the BGR reference is a PTAT? We cancel out the CTAT and PTAT to get BGR reference, rt? Will there be that big percentage of change in BGR current? Could you please enlighten me.
Awesome explanation sir....best i have seen
Great lecture, thank you so much Sir.
Waiting for the next great lecture !
Thanks for the feedback
Excellent explanation sir. Thank you.
Exceellent explanation sir. Thank you
You are welcome
part 1 current mirror was very useful and i am waiting for part 2 current mirror
Great explanation. Hope to someday see you add to your channel. There is a surprisingly low amount of online resources on these topics. Thank you for your contribution
Thanks for the feedback
That was very helpful! waiting for part2 eagerly
Sure...part 2 will be more on layout related stuff
@@analoglayoutdesign2342 where is part 2
@@analoglayoutdesign2342 please upload part 2
Very nice explanation.
Very informative..
Thanks for the feedback
sir please upload the part-2 of this current mirror we have awaiting from long time
Ok
There is a load here ummm circuitry here 😂😂, I like the way you trying make it more simpler and simpler, this is what we need from lecturers before using a technical term, lecturers need to make the students understand what it's meant for
sir please upload part-2 for matching techniques
Sir, Can you please make the 2nd part also.
Yes will do
great lecture
Thanks got the feedback
Dearest Sir, we are still waiting for part 2 🙏🙏🙏thank you very much
Will try to get some time. Sorry for the delay
@@analoglayoutdesign2342 quickly do it sir
Dearest Sir, we are still waiting for part 2… no matter how long it takes. Thank you very much ❤
Superb
sir can you please make a video on self biased cascode current mirror and its importance in design?
Sir can you do video on differential pair
Yes.. will do.. even I have plan..
sir please upload video on diff pair also with proper explaination
yes very soon I will upload diff pair
Please upload the second part too.
I have a question, in my graduation project we are asked to put current mirror load to test load variations across corners, how to put this current mirror at Vout of a switched cap circuit to test load variations?
I haven't come across such a situation.. need to check
sir can please upload part 2 current mirror
little time reqd
Hi ,
Can you please upload a video about second order effects..
sure...
Hi sir. @20:51 can not we just short 1v nodes of both cascode mirrors? Ultimately they will become same when we just connect them.
Please go thru.. we can’t do it that way
Were we use programmable current mirror ?
we will use current dac.. there we will use...sometimes in some corners, the gain of amplifier may reduce/increase...in order to get back the desired condition, we will use it. there are many places where we use it. the current will be controlled by digital bits like 4bit control or 6bit control etc.
when will be part2
Could you please explain PLL sometime??
Ok will try with introduction video
Thank you
Current mirror part 2 not available please upload it..
ya..will upload...need time...
Is part 2 available?
Sir stick to one explanation that due to Vgs current is drawn.In cascode you explained that I is drawn and that sets the vgs .People might get confused.I believe you understand that in electronics and Electrical its the I which is dependent not the V.
No...that's the point... Bottom transistor vgs sets the current...
So cascode transistor vgs cannot again set the current...
Please go thru again...it's a important concept...not easy to comprehend... Hope its clear
@@analoglayoutdesign2342 I think you said that due to the 1ma current the vgs is set to 1 vgs in the bottom diode connected MoS
Bottom transistor vgs is set by current reference and diode connected device..anyways.. I think the concept is clear
Thanks
Will upload matching in few days... that way current mirrors would be complete
Sir please upload part2 asap..
Sure will do... mainly matching concepts
@@analoglayoutdesign2342 yeah thank you sir
karrent meereeerz ??????
where its 2 part
yet to be recorded
will do shortly
I like u r video n the way explanation keep it up n go ahead
When I'll upload the part2?
why we prefer interdigitized matching for current mirror can u explain in brief
interdigitized matching should be fine for current mirror..bcos the current that we mirror itself will have 20% variation.... generally it will be PTAT current....that we use everywhere...from the BGR
@@analoglayoutdesign2342 Could you please elaborate on the above statement ?
Does this means ,if we are mirroring a 50uA current the mirrored branch can vary up to 60uA (20%) as worst case?
@@Gkcptplm ..not thats not the meaning...your reference current ie. 50uA itself varies from 50uA to 60uA... generally we will have a PTAT current from BGR.. that will be used for biasing all blocks... so it varies for sure by that percentage....hope I answered...but however if the reference current itself is very accurate like in case of LED drivers etc, then current mirrors can be common centroid or cross coupled, meaning you match it in both x & Y
@@analoglayoutdesign2342 How is the BGR reference is a PTAT? We cancel out the CTAT and PTAT to get BGR reference, rt?
Will there be that big percentage of change in BGR current? Could you please enlighten me.
@@Gkcptplm BGR voltage will have very less variation...but the current in the branch will have PTAT variation..
حس
Meaning?
@@analoglayoutdesign2342 sir I've completed all your videos, why you didn't uploading more videos related to layout? eagerly waiting
@@muhammedjabisk6109 I am busy with work... trying to get some time... once I get I will upload video
@@jayateerthar5224 thank you