Brilliant, thank you. I really liked the detailed example provided, how one would use the impedance calculator built into the layer stack manager for different routing topologies 👌 Very helpful 👍
Man, this series' is a gold mine of practical information. Hopefully you would maintain this kind of setup in the future with separated topics with videos straigt to the point and as short as possible.
Another advantage of the coplanar waveguide is that it makes your stackup much more resilient to issues that arise from the dielectric weave. Depending on the weave of the e.g. FR4, you can get wildly different impedance profiles in real products, because some boards will have one or the other line going over more gaps in the weave; in fact, I think the weave of the dielectric is the primary reason controlled impedance is so much higher cost, but don't quote me on that. As shown in this video, the ground waveguide has significantly better coupling to the traces than the relatively distant reference plane, which significantly mitigates the nasty side-effects of routing over an unpredictable weave.
You've hit a great point about the weave, and it's one of the things I'm including in my next iteration of lossless-to-lossy impedance transforms in my own research. The last one I presented at EDICON did not include this intentionally because I wanted to focus on the wideband portion for microstrips/striplines (and thus differentials), but I didn't treat coplanar traces. Today's software tools for modeling this don't look at the impedance at all, they actually look at the skew in long channels using Monte Carlo, as it turns out the resulting distribution in skew is Gaussian. But you're right the real effect is in impedance and in consequence it is in the losses, but no one looks at this because there hasn't been a good statistical model for it. That's why I want to focus on it next.
best regadrds! we are talking about tracing, you must admit, it would be very nice to give a few examples in practice, how to do it and how to avoid mistakes?
Absolutely! It's on my list. In the meantime, you can watch one of my IEEE presentations on my channel to learn more about wideband analysis of interconnects with copper roughness.
When setting up an antenna (outside, as for a ham radio for example) it's pretty common practice to have a 75 ohm output from a transceiver, and put that through a balun to a 300 ohm twin lead feed line to the antenna. Or vice versa. Or both, which is kind of silly but certainly possible. My stupid question is this: how awful would it be, and why, to route your traces as whatever Z they happen to work out to because you happen to like that trace width and just have an impedance matching network on either end?
in RF you probably deal with one signal frequency, or two signals (data+carry) , but but digital systems has very wide bandwidth, so it may not be possible or logical to get an Impedance using matching network.
Very nice video! Is it possible to design a pcb with only two USB connectors Typ-A and Typ-B with a direct connection? (kind of a USB-adapter) What should I pay attention to there?
If you're only doing a 2-layer board the standard core thickness is about 60 mils, or 1.5 mm. You could go with a slightly thinner core of 40 mils, or 1 mm.
In the datasheet it says what impedance to use. They say 85 Ohms in the datasheet, but with their stated tolerance you can just use the USB 2 or 3 specifications at 90 Ohms.
Your videos and papers are really appreciated! You do an outstanding job of presenting complex information in an understandable way. I am unable to find an online calculator that duplicates your values. In fact, I cannot find two calculators that each give the same values, and none of them have the top side grounds in the calculations, just the two signal traces. The Altium product does not support Linux, so I cannot use that either. My issue is that I need to implement USB-C 2.0 High Speed device on a two layer board. Your presentation would have provided the solution if it also showed values for 10 mil spaces, instead of only 5 mil spaces. My pcb vendor charges a significant premium for 5 mil spaces, whereas their standard spacing is 10 mils. Also, your paper uses Dk = 4.8, whereas my pcb vendor lists Bk = 3.9. Can you point me to a coplanar microstrip differential pairs calculator that I can use to determine trace width when the inter-trace gap and trace-to-gnd gaps are each 10 mils?
You Demystified my misconcepts about impedence control thanks so much.
You're welcome, please let me know if you have any questions
Brilliant, thank you. I really liked the detailed example provided, how one would use the impedance calculator built into the layer stack manager for different routing topologies 👌 Very helpful 👍
Man, this series' is a gold mine of practical information. Hopefully you would maintain this kind of setup in the future with separated topics with videos straigt to the point and as short as possible.
Thank you, I'm working on keeping it going as long as possible!
Very interesting and nicely presented in 21 minutes
Many thanks!
Another advantage of the coplanar waveguide is that it makes your stackup much more resilient to issues that arise from the dielectric weave. Depending on the weave of the e.g. FR4, you can get wildly different impedance profiles in real products, because some boards will have one or the other line going over more gaps in the weave; in fact, I think the weave of the dielectric is the primary reason controlled impedance is so much higher cost, but don't quote me on that. As shown in this video, the ground waveguide has significantly better coupling to the traces than the relatively distant reference plane, which significantly mitigates the nasty side-effects of routing over an unpredictable weave.
You've hit a great point about the weave, and it's one of the things I'm including in my next iteration of lossless-to-lossy impedance transforms in my own research. The last one I presented at EDICON did not include this intentionally because I wanted to focus on the wideband portion for microstrips/striplines (and thus differentials), but I didn't treat coplanar traces. Today's software tools for modeling this don't look at the impedance at all, they actually look at the skew in long channels using Monte Carlo, as it turns out the resulting distribution in skew is Gaussian. But you're right the real effect is in impedance and in consequence it is in the losses, but no one looks at this because there hasn't been a good statistical model for it. That's why I want to focus on it next.
Clear as the water :) Very Helpful!.
Glad it was helpful!
Awesome video! I am still missing a lot of basic concepts in order I can fully understand it... but I'm on it! :)
Excellent!
best regadrds! we are talking about tracing, you must admit, it would be very nice to give a few examples in practice, how to do it and how to avoid mistakes?
I actually show how to design and ruote it in this project: th-cam.com/video/bMlYdPKMof0/w-d-xo.html
I dont know if he is the best, but I know he is super good
Excellent video, thank you very much!
Glad you liked it!
Very nice explanation
Please proceed with remaining pcie,sata,DDR3...etc
We'll probably do Ethernet next, stay tuned!
Hey can we get a video on copper roughness and change in impedance profile?
Absolutely! It's on my list. In the meantime, you can watch one of my IEEE presentations on my channel to learn more about wideband analysis of interconnects with copper roughness.
When setting up an antenna (outside, as for a ham radio for example) it's pretty common practice to have a 75 ohm output from a transceiver, and put that through a balun to a 300 ohm twin lead feed line to the antenna. Or vice versa. Or both, which is kind of silly but certainly possible. My stupid question is this: how awful would it be, and why, to route your traces as whatever Z they happen to work out to because you happen to like that trace width and just have an impedance matching network on either end?
in RF you probably deal with one signal frequency, or two signals (data+carry) , but
but digital systems has very wide bandwidth, so it may not be possible or logical to get an Impedance using matching network.
Very nice video! Is it possible to design a pcb with only two USB connectors Typ-A and Typ-B with a direct connection? (kind of a USB-adapter) What should I pay attention to there?
If calculate the impedance it ask for the height of the substrate.in this case for two layer board how can I choose this height please tell me...
If you're only doing a 2-layer board the standard core thickness is about 60 mils, or 1.5 mm. You could go with a slightly thinner core of 40 mils, or 1 mm.
If I use EClamp8052p near port on device, do I have to target same impedance of 90 ohm ?
In the datasheet it says what impedance to use. They say 85 Ohms in the datasheet, but with their stated tolerance you can just use the USB 2 or 3 specifications at 90 Ohms.
Your videos and papers are really appreciated! You do an outstanding job of presenting complex information in an understandable way.
I am unable to find an online calculator that duplicates your values. In fact, I cannot find two calculators that each give the same values, and none of them have the top side grounds in the calculations, just the two signal traces.
The Altium product does not support Linux, so I cannot use that either.
My issue is that I need to implement USB-C 2.0 High Speed device on a two layer board. Your presentation would have provided the solution if it also showed values for 10 mil spaces, instead of only 5 mil spaces. My pcb vendor charges a significant premium for 5 mil spaces, whereas their standard spacing is 10 mils.
Also, your paper uses Dk = 4.8, whereas my pcb vendor lists Bk = 3.9.
Can you point me to a coplanar microstrip differential pairs calculator that I can use to determine trace width when the inter-trace gap and trace-to-gnd gaps are each 10 mils?
Hi GLHB! Just letting you know that I haven't forgotten about your question, I'll be filming something about it today.