Distinguished Talk 02: Systematic Design of Analog CMOS Circuits

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  • เผยแพร่เมื่อ 9 ก.ค. 2020
  • The Distinguished Talks is a series of webinars on IC Design and IC Devices promoted by the IEEE SSCS-EDS South Brazil Joint-Chapter. The invited speakers are experts in the field of integrated circuits.
    Distinguished Talk 02: Systematic Design of Analog CMOS Circuits by prof. Dr. Paul Jespers (UCLouvain).
    Abstract:
    Circuit designers take advantage currently of simulators to determine currents and transistor dimensions so as to meet desired global objectives. To finalize initial hands-on projects, the currents and sizes are being adjusted iteratively. The high degree of compliance achieved after repeated runs is due to sophisticated transistor models put to use in the simulators. If we could use these, right at the start of hands-on design, the number of iterations needed in order to finalize projects could be drastically reduced. Unfortunately, huge number of data are required by these models making the approach totally impracticable. In this presentation, we describe a methodology that enables designers to achieve transistor sizing still making use of simulator models. The only assumption that is needed is that the transistor parameters that we consider vary like the width of the transistors, a condition met naturally in many analog CMOS circuits. The proposed sizing methodology makes use of lookup tables derived from simulators, which represent small signal parameters and ratios of parameters versus operating point. Such tables are to be setup only once per given technology. We show by means of examples that with these tables it is possible not only to size quasi correctly analog circuits from start but also to perform analytical optimization, which opens many interesting perspectives.
    Short CV:
    Paul Jespers (IEEE Fellow) received the EE. Degree from Université Libre de Bruxelles (1953) and the Doctoral Degree (from Université Catholique de Louvain (1959) in Belgium. During 6 years he worked at the Laboratoire Central d’Electricité (now Laborelec) on radio interference standardization, In 1968-69 he joined the semiconductor lab of Stanford University. He was appointed assistant professor at the Université Catholique de Louvain (UCL) in 1959 and became became full professor in 1963. He is the founder of the microelectronics laboratory of UCL (an offspring: IRIS-Canon). He was a visiting professor at ISEN, ISEP, ESEO (France) and UCBerkeley, Visiting lecturer at UAB of Barcelone and Univ of Séville (Spain), UFRGS and UFSC (Brazil), UCC Cordoba (Argentina), Edith Cowan Univ (Australia) and China (Datang Beijing, Shanghai). He was appointed expert by the United Nations Industrial Development organization in India (1984-87) and served IEEE as Region 8 director 1970-71.
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