DRAM 02 - DRAM vs SRAM

00:15 Not Gate / Buffer / Memory
01:52 Operation at the memory cell level
03:35 Writing with SRAM
04:01 Reading with SRAM
05:09 DRAM vs SRAM

[@1.5Tvs3.0T]

Thank you for making these videos, you are doing a great job! I don't think you need to worry about the way you speak English. We can understand you 100%!

[@openlogic925]

Thanks 😀. I'm sure there is a huge room for improvement.

[@S2G-FC]

This guy basically designed his own type of SRAM .SRAM uses OR gates and AND gates to store data it's called a gated latch

[@mdesm2005]

These are great videos. I learned a lot about DRR memory. Great illustrations. To help make these better, I'd suggest replacing "in simplicity" with something like "in short" or "in essence" or "essentially", something like that.

[@openlogic925]

Thanks. But very interesting suggestion; I mean I'm not sure why that particular one, if you don't mind, do entertain me. Overall I'm aware of the slang that I have. But the videos probably would never happen if I were to improve my English to a native speaker level. Of course nowadays I probably can use a generative AI voice. Thanks again.

[@mdesm2005]

@@openlogic925 Please, no AI. Keep it as it is. It's the only one that keeps recurring that's a bit strange. All other "imperfection" are quite understandable for a non native speaker.

[@openlogic925]

@@mdesm2005 Thanks for the response. I'll pay attention in the future

[@S2G-FC]

Yeah this guy is wrong that not how a not gate circuit looks like it only needs 1 transistor