Adding IP to a PYNQ overlay - tutorial
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- เผยแพร่เมื่อ 29 ส.ค. 2024
- Example showing how to add AXI SPI IP to a Vivado IP Integrator design. This design uses the base overlay design for the Pynq-Z1 as a starting point and shows how to modify it and add new IP.
The bitstream is created, along with the block diagram Tcl. the files are copied to the board, and a Python driver can be written for the IP using MMIO.
Thanks for this Video...it helps so much
Thank you so much
No Audio sound or is it just me having this issue ?
No audio :'(
Is there a way to open the base overlay on vivado 2023.1?
Is there another video that continues this one?
yes this doesn't have audio
this is outdated! For Pynq Z2 I cannot find build_base_ip.tcl on the PYNQ-master downloaded