185N. Phase noise in oscillators (introduction)

Analog Circuit Design (New 2019)
Professor Ali Hajimiri
California Institute of Technology (Caltech)
chic.caltech.edu/hajimiri/
© Copyright, Ali Hajimiri

[@ximingfu1426]

Ali Hajimiri is the best with no questions !!!!

[@corydiehl764]

Awesome, I was just getting ready to look through your lectures for one on oscillators. I was using an OpAmp as a buffer, but it started self-oscillating.

[@sohamlakhote9822]

Thank you so much!!
Who can explain it better than the author himself :-)

[@ashwith]

He explains it so well even in the paper. It's the one paper that I could understand with minimum head scratching.

[@abhijitchaudhari2362]

Brilliant explanation Prof Hajimiri! The explanation augments really well to the one in your paper. Thank you so much

[@LydellAaron]

6:08 regions for most oscillators. Since they are inherent, let us utilize their asymptotic nature at those corner frequencies. 14:02 virtual damping -- the phase timing jitter explained on a decaying LC sinusoid with impulse response. Very nice talk. 24:51 an oscillator has no way of knowing its previous phase -but what if they could?
27:03 Impulse sensitivity function ISF captures the sensitivity of an oscillator to the input impulse. 1:06:17 is like a good record you have to listen a few times, including 1:07:52
1:08:07 - minimum ISF sensitivity at the peaks
1:11:01 - time-shifted ISFs - (a tensor, superposition) in motion
1:11:30 - creation of superposition of tensor superposition state
1:20:30 - resonance with nearly moving tensor, especially quadrature.
1:30:55 - invite to read two papers

[@miaotang969]

I tried to read your paper many times, but not quite understand. Now it's clear.

[@e.m.b1057]

Hello,
Thank you very much for this video, it is very informative, and I learned a lot.
I do have a question though (basic one).
In the beginning of the video you state that the jitter variance widen over time and I don't quite get it.
I understand that the phase "error" you add at each clock cycle stays there for ever, therefore over time you keep on adding errors with a given distribution.
Which means over time you have more and more chance to be really off the "ideal" edge position (vs. time).
But I don't get why the the distribution itself widens (ie. variance increases over time, t^2 in your graph)...
Can you help me understand that?
Regards.

[@polysh]

Thank you for the lecture. Are the slides available for download?

[@dirkdirksen7403]

I really like the lectures of Ali Hajimiri. Nevertheless, I got some questions:
In the according paper equation (21) and that shown in th-cam.com/video/wByzymJ0Ppc/w-d-xo.html are not equal (different by a factor of 2). Is it because of single- and double-sided spectra? Moreover, I get a little confused by the usage of S_phi. Sometimes it is used as the spectrum of Phi and sometimes as the PSD of Phi.

[@SandeepKumar-jj7zi]

Is there a link to the two papers by Prof Hajimiri ?

[@nimitjain4923]

Thank you so much Prof. Hajimiri. I think at time: 29:36, it is Gamma(w0*tau) instead of Gamma(w0*t). Is it correct or am I missing something?

[@chaowu2781]

You are right and it should be Gamma(w0*tau). It was correct in the original paper.

[@AliHajimiriChannel]

You are right. I should correct that in the slides. Thank you.

[@VikramSingh-hp2sn]

Can I get the slides used in this lecture?

[@jipm92]

Is the capital gamma function of (wo *t) the reflection coefficient of the impedance matching? If so, that woul explain that cancelling the reactive component of the negative impedance optimize to the minimum the phase noise magnitude.

[@AliHajimiriChannel]

It has NOTHING to do with reflection coefficient. It is the Impulse Sensitivity Function defied earlier in the video.

[@mohammadahmadlou561]

Time "01:15:00" rms-Jitter vs. time for free-running osc., you said equal rise/fall-time will reduce flicker noise portion (independent part) bcs DC value of ISF becomes zero. This is right only if NMOS/PMOS flicker noise currents are correlated. But they're NOT. So, each device has its own ISF, and the noise of each will be unconverted separately. Am I correct?

[@AliHajimiriChannel]

It is correct that the noise of the NMOS and PMOS are uncorrected. There is a more detailed analysis that calculated the effective ISF of each of the NMOS and PMOS devices and takes the aggregate into account. I usually show that slide in the longer presentations, but not in this video. It shows that there is still a reduction, although it is not possible to zero it out.

[@mohammadahmadlou561]

@@AliHajimiriChannel Thanks for the reply. I've read your paper on ring osc. Yes, equal tr/tf decreases the corner frequency "fc" and the PN at far-out offsets is improved. I mean, "fc" is around tens of megahertz in ROs right? -especially in short channel devices. But in far-in say 100KHz, PN improvement may not be appreciable. Am I right?
By the way, your results on your paper are for current-starved RO type where you mainly play with the starved transistors to make tr/tf equal. But in a simple RO, your charging and discharging paths may experience different load cap (say for fanout=2, "CL" is twice in charging mode since PMOS is twice the NMOS). So, PN improvement may not be so touchable even in far-out. Do you agree?

[@pl5094]

1:04:06 Why increasing the mobility can make the drain current lobe narrower?

[@AliHajimiriChannel]

Because these oscillators don't operate in a constantly on state and in steady-state the transistor only turns on to draw enough current through the tank when the emitter/source is at the lower voltage.

[@stefano.a]

I watched with satisfaction the firsts 184 videos and this is the first that I found not so clear. Perhaps it is too fast and the slides parts are not strictly correlated (highlighted) with speech

[@debabrata2137]

How does the formula 2D/(del_w)^2 came?

[@mtrsambhar]

I wish slides were shown for more time instead of focusing on professor.

[@ElectroWiz]

چ😇را فکر میکنم ایرانی هستی