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Check out Digital Electronics courses at: bit.ly/3aIM1urUse coupon "TH-cam12" to get FLAT 12% OFF
Excellent explanation with step by step procedure mam
A very good explanation.. Thanks for the help.
Awesome teaching in a simple way
This video throws out from confusion tnq u maam
Thank u mam for valuable teaching it helped me lot
Aweosme explanation on the counters thanku mam🙏
excellent mam tqsm I have understood very clearly
Such a beautiful class❤❤❤❤❤
OUTSTANDING EXPLANATION, THANKS
completed my dld portion wow thank you sooooo much from NMIMS MUKESH PATEL
Thank you mam.. nice teaching
Mam..very useful...
Thank you mam nice lecture
Very good explanation
Thank you So much ma'm.
Great teacher
Thanks mam very helpfull to me
Awesome mam
Thank you so much mam💯
In the negative clock pulse if the input of clock is 0 then it triggers means it has to change for first stage but both j and k remained zero
same doubt, please help
If ck is 0, then it does not affect anythng..So j and k also remains 0
Good explanation
Thank u mam
Good explanation mam tq
Thank you ma'am
Thank you
Mam,Your all lectures r easily to understand... it's very helpful for me
Nice
Mam a small correction. The symbol of negative edge clock in the the up counter should be changed...
Mam please make the video about booth algorithms and also Programable logic arrays and PAL
what is difference between up and down counter?
mam can't we use preset to intilize the output of flipflop 1 for any bits
Good video, thnks! but i dont undestand the values "j" and "k" in the flip flops?
2 bit up down asynchronous counter...plz
how to find value mam
Can anyone please explain the 3- bit asynchronous down counter with positive clock pulse
Yes shall I?
if it will toggle when 0 clock pulse will be applied then how the first jk flip flop is toggling???
You get answer of this question or not
Mam can you make video for ripple up and down counter
Good mam UJ love ❤️ you
i think you are wrong because in up counter the normal output of jk flip flop is connected to clock signal..
Yes
Either we change clock pulse or input watch video properly
How u added 3,2,1 in the positive edge triggered clock
Mam what is difference synchronous and ripple
All asynchronous counters are ripple counters
"sir-cute"
Thanks madam
Thanks mam
Check out Digital Electronics courses at: bit.ly/3aIM1ur
Use coupon "TH-cam12" to get FLAT 12% OFF
Excellent explanation with step by step procedure mam
A very good explanation.. Thanks for the help.
Awesome teaching in a simple way
This video throws out from confusion tnq u maam
Thank u mam for valuable teaching it helped me lot
Aweosme explanation on the counters thanku mam🙏
excellent mam tqsm I have understood very clearly
Such a beautiful class❤❤❤❤❤
OUTSTANDING EXPLANATION, THANKS
completed my dld portion wow thank you sooooo much from NMIMS MUKESH PATEL
Thank you mam.. nice teaching
Mam..very useful...
Thank you mam nice lecture
Very good explanation
Thank you So much ma'm.
Great teacher
Thanks mam very helpfull to me
Awesome mam
Thank you so much mam💯
In the negative clock pulse if the input of clock is 0 then it triggers means it has to change for first stage but both j and k remained zero
same doubt, please help
If ck is 0, then it does not affect anythng..
So j and k also remains 0
Good explanation
Thank u mam
Good explanation mam tq
Thank you ma'am
Thank you
Mam,Your all lectures r easily to understand... it's very helpful for me
Nice
Mam a small correction. The symbol of negative edge clock in the the up counter should be changed...
Mam please make the video about booth algorithms and also Programable logic arrays and PAL
what is difference between up and down counter?
mam can't we use preset to intilize the output of flipflop 1 for any bits
Good video, thnks! but i dont undestand the values "j" and "k" in the flip flops?
2 bit up down asynchronous counter...plz
how to find value mam
Can anyone please explain the
3- bit asynchronous down counter with positive clock pulse
Yes shall I?
if it will toggle when 0 clock pulse will be applied then how the first jk flip flop is toggling???
You get answer of this question or not
Mam can you make video for ripple up and down counter
Good mam UJ love ❤️ you
i think you are wrong because in up counter the normal output of jk flip flop is connected to clock signal..
Yes
Either we change clock pulse or input watch video properly
How u added 3,2,1 in the positive edge triggered clock
Mam what is difference synchronous and ripple
All asynchronous counters are ripple counters
"sir-cute"
Thanks madam
Thanks mam