I wish they did not get rid of the templates. I should check my old laptop as it has an older version of AD on it, maybe the templates are still there and I can share them!
I was referring to using the via fence to place a guard ring around the edge of the PCB. This can be set to chassis ground so that it can divert ESD away from the components in the card. However, this is not required and in many cases the interface on the PCIe card (i.e., Ethernet) may have sufficient ESD protection that you do not need the guard ring. If you do not need it then you can delete it.
Another great video. I have not checked your template yet, but is it worth mentioning the dimensional/ positional tolerances and chamfering and hard gold plating specs that could be included in fabrication doc? They are noted in most connector data sheets, so i guess it goes without saying. Not specific to these pcie edge connectors, but I have seen under specifying the alignment/tolerance of the board edge key relative to the pads for other types of card edge connectors cause shorts to the wrong pins, but that was likely a tighter pitch than standard pcie connectors.
When you create a fabrication drawing it is a good idea to include these in the fabrication notes. This is something I have probably mentioned in a different video regarding fabrication notes in a previous video. Since the tolerance is noted in datasheets perhaps you can use their number. Whatever tolerance target you have, you do need to communicate this to the fabrication house because they never have that information memorized and they won't look at the connector datasheet to figure it out.
What determines if a high speed PCB like this needs a guard ring? I often see guard rings around the various PCBs in a laptop, is it hidden in the ground pour? nvm, i just watched the rest of the video and saw the via fence...
I would be careful when saying that a high-speed PCB "needs" the ring, there are plenty of designs that never include it. In a PCIe card like this, the guard ring allows the chassis ground to extend around the edge of the PCB so that any ESD surge coming into the bracket/connector gets diverted into the chassis ground rather than entering the system ground and potentially damaging components. This PCIe card outline was used for a networking card with Ethernet, so it uses the chassis ground ring as a connection to the connector shroud and the chassis in the enclosure. Similar strategies are used with a USB hub card or a graphics card with HDMI/DisplayPort outputs for example.
I recently had to design a MiniPCIe card. I was surprised when i saw that newer version of Altium had then templates for those kinds of cards removed.
Ha, so the Altium Design content PCIe templates are making a return?
I wish they did not get rid of the templates. I should check my old laptop as it has an older version of AD on it, maybe the templates are still there and I can share them!
It's Zach...Awesome!!!
It seems their videos are no longer downloadable.
Great video although we're also interested in the MiniPCIe standard. Do you have templates for those cards as well?
Good info,I just did not understand what would you meant by using the via fence for ground?
I was referring to using the via fence to place a guard ring around the edge of the PCB. This can be set to chassis ground so that it can divert ESD away from the components in the card. However, this is not required and in many cases the interface on the PCIe card (i.e., Ethernet) may have sufficient ESD protection that you do not need the guard ring. If you do not need it then you can delete it.
Another great video. I have not checked your template yet, but is it worth mentioning the dimensional/ positional tolerances and chamfering and hard gold plating specs that could be included in fabrication doc? They are noted in most connector data sheets, so i guess it goes without saying. Not specific to these pcie edge connectors, but I have seen under specifying the alignment/tolerance of the board edge key relative to the pads for other types of card edge connectors cause shorts to the wrong pins, but that was likely a tighter pitch than standard pcie connectors.
When you create a fabrication drawing it is a good idea to include these in the fabrication notes. This is something I have probably mentioned in a different video regarding fabrication notes in a previous video. Since the tolerance is noted in datasheets perhaps you can use their number. Whatever tolerance target you have, you do need to communicate this to the fabrication house because they never have that information memorized and they won't look at the connector datasheet to figure it out.
What determines if a high speed PCB like this needs a guard ring? I often see guard rings around the various PCBs in a laptop, is it hidden in the ground pour?
nvm, i just watched the rest of the video and saw the via fence...
I would be careful when saying that a high-speed PCB "needs" the ring, there are plenty of designs that never include it. In a PCIe card like this, the guard ring allows the chassis ground to extend around the edge of the PCB so that any ESD surge coming into the bracket/connector gets diverted into the chassis ground rather than entering the system ground and potentially damaging components. This PCIe card outline was used for a networking card with Ethernet, so it uses the chassis ground ring as a connection to the connector shroud and the chassis in the enclosure. Similar strategies are used with a USB hub card or a graphics card with HDMI/DisplayPort outputs for example.