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High-Speed Design Secrets: Balancing Copper & Dielectric Losses
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- เผยแพร่เมื่อ 16 ส.ค. 2024
- Tech Consultant Zach Peterson explores the intricate world of copper and dielectric losses in RF transmission lines in this video. He delves into the nuanced differences between these two types of losses and their impact on high-speed and RF transmission line efficiency.
Watch to discover the interplay between copper losses, associated with factors like skin resistance and copper roughness, and dielectric losses, driven by frequency dependence and material properties. Zach also provides a practical tool - a free calculator for optimizing your designs.
This video is essential for anyone involved in high-speed circuit design or RF engineering. Whether you're dealing with complex PCBs or simply looking to deepen your understanding of these critical concepts, this guide is invaluable.
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0:00 Intro
0:41 Loss Factor Review
5:22 The Calculator
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Very nicely explained with useful methodology and expression. Many Thanks for the video 👍
Thank you Zach ☺, you are amazing!!! You helps me a lot.
Greetings from Spain.
Hello Zach! Thank you so much for this and other your videos!
Could you please clarify one question for me (which may not quite relevant to this topic, but still): Quite often in the comments I see such a statement: transmission lines with a higher capacitance strongly slows down the signal edges. The closely spaced forward and return paths create a larger capacitance and the high-frequency component is lost because of this capacitance.
And as an example, the Transatlantic telegraph cable is sometimes mentioned, which had an imbalance between capacitive and inductive reactance, and as a result, a large dispersion and distortion of the signal.
And my question is: does this statement somehow apply to PCBs? Can there be any conditions under which an increase in the capacitance/decrease in the inductance of the transmission line will negatively affect the bandwidth and reduce the speeds of the edges?
* assuming that we are talking about high frequencies/long lines.
Thank you very much!
At a basic level, the answer is "yes" more capacitance will increase the dielectric loss; this can occur through having a higher Dk medium, lower impedance, or both. It does not matter if we look at PCBs or any other system.
But the other thing to note is that this point about "closely spaced forward and return paths create larger capacitance" is incorrect in general. Any transmission line that has a specific impedance will have very close to the same capacitance and inductance values regardless of whether the line is on a thick dielectric or a thin dielectric. So this idea of "moving the return path closer" will always increase the capacitance is incorrect. Changing to a thin layer affects other things that are important, like skin effect loss and the inductive reactance created by skin effect, but that's related to conductor loss and not dielectric loss.
@@Zachariah-Peterson Hello Zach! Thank you very much for your clarifications!