I hope one day you can create a full course in Udemy in regards to signal integrity with Allegro, btw: why you've selected the default IBIS model: 1.8V with 1pF, instead of other one, which criterion and logic you have applied here to Select that model?.
Yeah Hector, i have already started working on it, got delayed due to lot of things are going on parallelly, Lets come back your doubt: in the video as you can see i have selected a bidirectional ibis file because we are simulating Parallel Data Bus of DDR2, now when we translate it into tool it will extract multiple ibis models, there we have selected 1.8V 1pF Bidirectional model. Reason is bus logic is 1.8V (Default it was assigned to 2.5V) and max bus capacitance 1pF (This is just an variant of Chip, which comes with 1pf, 2pf, 10pf )
He's showing how to use tools - which is fine, not the physics of signal integrity .. from this info the user can pick any ibis file for their own case
Sigrity Aurora 17.4 can we download trail version
Great
I hope one day you can create a full course in Udemy in regards to signal integrity with Allegro, btw: why you've selected the default IBIS model: 1.8V with 1pF, instead of other one, which criterion and logic you have applied here to Select that model?.
Yeah Hector, i have already started working on it, got delayed due to lot of things are going on parallelly,
Lets come back your doubt: in the video as you can see i have selected a bidirectional ibis file because we are simulating Parallel Data Bus of DDR2, now when we translate it into tool it will extract multiple ibis models, there we have selected 1.8V 1pF Bidirectional model. Reason is bus logic is 1.8V (Default it was assigned to 2.5V) and max bus capacitance 1pF (This is just an variant of Chip, which comes with 1pf, 2pf, 10pf )
He's showing how to use tools - which is fine, not the physics of signal integrity .. from this info the user can pick any ibis file for their own case
I want to join ur udemy class
Hey Karan, You can directly purchase the course from Udemy