How to Use Blind and Buried Vias

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  • เผยแพร่เมื่อ 1 มิ.ย. 2024
  • How do you use blind and buried vias? And when should you consider them for your PCB design? That's what Tech Consultant Zach Peterson explores in this video, focusing on layer transitions, routing, and how to use blind and buried vias in Altium Designer.
    0:00 Intro
    0:27 Blind & Buried Vias in the PCB Stackup
    4:33 Layer Transitions
    7:46 Stacked & Staggered Routing
    9:59 Boomerang Routing
    12:27 Blind & Buried Vias in Altium Designer
    For more PCB Routing videos, click here: • PCB Routing
    For more PCB Design for Beginners videos, click here: • PCB Design for Beginners
    For more Tech Consultant Zach Peterson videos, click here: • Technical Consultant Z...
    👉 Advanced High-Density PCB Layout and Design in Altium Designer: resources.altium.com/p/advanc...
    👉 2+N+2 PCB Stackup Design for HDI Boards: resources.altium.com/p/2n2-pc...
    👉 Blind And Buried Vias-What Are They And How Are They Used?: resources.altium.com/p/blind-...
    👉 How to Use Blind and Buried Vias in Altium Designer: resources.altium.com/p/how-to...
    👉 Defining Blind, Buried & Micro Vias in Altium Designer: www.altium.com/documentation/...
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ความคิดเห็น • 12

  • @RedRacconKing
    @RedRacconKing 10 หลายเดือนก่อน +1

    Fantastic video as always, Zach.

  • @omprakashbanerjee4772
    @omprakashbanerjee4772 10 หลายเดือนก่อน

    Thanks for the wonderful explanation

  • @michaelershov4653
    @michaelershov4653 10 หลายเดือนก่อน +1

    Thank you, Zach! Great video, excellent explanation! Can you please say more about skip VIA?

    • @Zachariah-Peterson
      @Zachariah-Peterson 10 หลายเดือนก่อน

      Sure, I can put together a video about it. I'll briefly summarize here though. A skip via skips one of the HDI buildup layers and lands on an internal layer. So it's like a blind via but it spans two layers instead of one layer. The skipped layer has no electrical connection. One reason you would do this is to eliminate any potential cracking at bonding points between the copper plating in stacked blind-buried vias.

  • @ThePaulus2010
    @ThePaulus2010 10 หลายเดือนก่อน

    like you said continiously, its a close contact situatiion with you fabricator. however for a lot of starting users they do not have a fabricator but use JLC etc.. also if you have been doing this you will ALWAYS get a fabricator who rather not do the multi blind buried configuration. because its a risk and the yield is low.. and please be aware that as a rule of thumb every blind or buried via will increas the cost of a PCB by 10% .. its better to just use through hole via's if you do not have to worry about impedance / signal integrity and cost. its hard to find proper help in these situations.. and switching fabricator is not always an option because of long standing agreements.. i have been in contact with a lot pf PCB manufacturers and going the blind/buried route all through the pcb is not a real life situation.. and i agree boomerang is more used in a lot of cases, so in theory your approach is correct, but i am missing the real life scenario here. (like with most examples in altium academy i am aware you have to keep it simple enough to capture a wide audience.)

    • @Zachariah-Peterson
      @Zachariah-Peterson 10 หลายเดือนก่อน

      Well sure some fabricators would prefer to not do microvias, or who would rather just do through-hole vias. As the designer if you choose fine pitch components you need to go into it realizing that you will probably need blind/buried, or maybe microvias, which then needs the proper stackup to support that, and that applies regardless of the impedance/SI needs. If someone thinks they are going to farm out a prototype to JLC with stacked blind/buried microvias at high layer count for $10 a piece they are nuts. I can say that going blind/buried throughout a stackup is a real life thing because I've designed and built it, it's just not very common and not all fabs or EMS will bid it. Much more common is a couple of outer buildup layers to support specific components and then conventional buried via rather than stacked blind-buried throughout the entire stack (ELIC).

  • @jimjjewett
    @jimjjewett 10 หลายเดือนก่อน

    What makes it a microvia? Is it just that it only goes through a single layer, so that 2-layer boards technically have microvias? Is it the shape (funnel vs cylinder)? Is there something about the diameter? Is a skip via just a via that goes through multiple layers, but is also either blind or buried?

    • @ThePaulus2010
      @ThePaulus2010 10 หลายเดือนก่อน

      micro via is usually a laser drilled via. limited to a certain dept. also the size is more to be like 4/10 mil in size.

    • @Zachariah-Peterson
      @Zachariah-Peterson 10 หลายเดือนก่อน

      Once you get less than the limit for mechanical drilling, they start calling them microvias. The laser drilling process generally results in the funnel shape because it has to do with the focusing of the beam into the substrate. Skip via in the standard HDI stackups (Type I, Type II, etc.) is normally a blind via spanning across more than one of the HDI buildup layers.

  • @jimjjewett
    @jimjjewett 10 หลายเดือนก่อน

    Why do they even make BGA so dense it can't be routed on a single layer? (Or at least, why package chips only in such a pattern?) Are they assuming that many pins won't be used? That using them all is complicated enough that you'll need a many-layer board anyhow? That 2-D physical size is uniformly important enough to justify complexity in the 3rd dimension?

    • @ThePaulus2010
      @ThePaulus2010 10 หลายเดือนก่อน

      this has to do with the internal chip architecture were.. and to why they make it, because we all want to have a tiny phone in our pocket with more horsepower than a supercar, a super thin laptop with excellent battery life. and because smaller means less material to use so you can build more of them form the same pile of base amterial.

    • @Zachariah-Peterson
      @Zachariah-Peterson 10 หลายเดือนก่อน

      Ultra-small devices that need a large amount of compute can only be done with very high density devices. It's the primary way you can fit all the stuff into the same product. Also think about something like mobile phones, they keep trying to pack more features into the phone that use more power, but you have finite space, so now they need tinier components with the same features in order to make more room for the battery.