AND || OR || NOR || NAND || XOR || XNOR gate using demultiplexer

[@krishnakittu6637]

Till now I don't know that we can do logic gates using demux. Thanks a lot even never imagined about these questions

[@VLSI-learnings]

Thank you

[@VLSI-learnings]

Implement all gate using demultiplexer in this video , if you have any doubts please feel free to comment below , I WILL ANSWER YOUR DOUBTS.
Thanks for watching , PLEASE DO SUBSCRIBE , IT WILL HELP , ME A LOT.

[@dniharika3578]

Can u help me in explaining how to design OR gate using half adder!

[@VLSI-learnings]

@@dniharika3578 ok ...Jai

[@ashishsasidharan5246]

Or gate can be implemented using three demux

[@vyshnavikonka9440]

I think there is no need of inversion of Or Gate to get Nor gate instead you can ignore the last demux in Or gate to get Norgate right..

[@VLSI-learnings]

Yes

[@ashishsasidharan5246]

B complement can be taken from second demux

[@ashishsasidharan5246]

Not gate can be implemented using 2 demux

[@VLSI-learnings]

Yes

[@shyamsundard5824]

SIR PLEASE HELP ME. I BEG YOU PLEASE. YOU ARE MY ONLY HOPE. CAN YOU PLEASE HELP ME HOW TO IMPLEMENT A 2 INPUT XOR GATE AND ANY OTHER GATES REQUIRED

[@candle98]

Are these vedios useful for veda iit exam ?

[@VLSI-learnings]

Yes

[@candle98]

Thank you