This video helped me understand the tradeoffs between fast and slow reference clock rates! If my application is targetting a specific serial protocol (e.g. USB 5G and 10G), it seems to make sense to choose a higher rate reference clock for faster lock and lower jitter. I know the latter half of this video is about how to design a PLL to support a wide bandwidth of frequencies, but now, I'm curious as to just how fast reference clocks can go. 🤔
Hi Michael, Nice to meet you and thank you so much for the feedback. I'm glad you like it and found it's useful for you. Usually, the fast crystal reference was 156.25MHz, which is not terribly expensive.
Hi Abhirup, always thank you so much for sharing your knowledge as well. Indeed, for the PMA4 112Gbps or 224Gbps, the 500MHz crystal should be needed and quite common as you mentioned. :)
Hi Sandip, nice to meet you and thank you so much for the feedback. I'm glad you like it and found it's useful for you. I'll take your advice to cover how to use sigma delta modulator in PLL.
Thanks for the video, very helpful. A question, it seems that the higher ref clk freq, the better jitter performance and stability. But why we cannot make ref clk freq as high as possible? Is it because of cost or physical limitation?
Hi Sleadyhead, nice to meet you and I'm glad that helped. Thank you for the very good question. Quick answer: Usually, the crystal oscillator is the most common reference clock source. The higher frequency of the crystal oscillator would have a higher price; therefore, in some high-end product, we must raise the frequency to 156.25MHz, which might still have reasonable price.
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Great explanation and very comprehensive presentation, thanks a lot! Will definitely check other pll-related videos soon❤
Hi Ani, nice to meet you and I'm glad you liked it. I'll be happy to make more PLL-related videos for you. :)
Thanks for the deep dive video. Hope you can create more videos about each blocks inside PLL, cause you guys make the best PLL in the industry.
Hi Bobby, I'm glad you like our PLL. Sure. I will create more videos about each blocks inside PLL. Thank you so much again for your good idea. :)
Nice video CC and nice analogy as well to explain why bandwidth in sampled systems should be much lower than sampling frequency!
Hi Abhirup, always thank you so much for the feedback. I'm glad you like it and found it's useful for you.
This video helped me understand the tradeoffs between fast and slow reference clock rates! If my application is targetting a specific serial protocol (e.g. USB 5G and 10G), it seems to make sense to choose a higher rate reference clock for faster lock and lower jitter. I know the latter half of this video is about how to design a PLL to support a wide bandwidth of frequencies, but now, I'm curious as to just how fast reference clocks can go. 🤔
500Mhz crystal refefences are quite common these days.
Hi Michael, Nice to meet you and thank you so much for the feedback. I'm glad you like it and found it's useful for you. Usually, the fast crystal reference was 156.25MHz, which is not terribly expensive.
Hi Abhirup, always thank you so much for sharing your knowledge as well. Indeed, for the PMA4 112Gbps or 224Gbps, the 500MHz crystal should be needed and quite common as you mentioned. :)
Really nice video! But I still have a some questions, like over-sampling about delta-sigma modulator.
And thanks a lot by the way😊
Hi 立庭,
Thank you so much for the kind words. You're very welcome and I'm glad you like it. Sure & what's the questions?
Thanks,
CC
Thank you very much, If possible please cover how to use sigma delta modulator in PLL
Hi Sandip, nice to meet you and thank you so much for the feedback. I'm glad you like it and found it's useful for you. I'll take your advice to cover how to use sigma delta modulator in PLL.
Thanks for the video, very helpful. A question, it seems that the higher ref clk freq, the better jitter performance and stability. But why we cannot make ref clk freq as high as possible? Is it because of cost or physical limitation?
Hi Sleadyhead, nice to meet you and I'm glad that helped. Thank you for the very good question. Quick answer:
Usually, the crystal oscillator is the most common reference clock source. The higher frequency of the crystal oscillator would have a higher price; therefore, in some high-end product, we must raise the frequency to 156.25MHz, which might still have reasonable price.