Lecture 4: Mental Model of the System

[@karangandha2851]

Very helpful !!

[@BasavarajPrakashagoudaPatilPat]

It's very helpful for understanding big picture of systems, iam waiting for next cpu mental model

[@prashlovessamosa]

Please keep uploading

[@Hashim_GURMANI]

In embedded systems, **I/O memory** refers to the memory-mapped I/O (MMIO) regions that are used to communicate with hardware peripherals. Unlike general-purpose memory, which stores data and instructions for the CPU, I/O memory is dedicated to interfacing with hardware devices such as GPIOs, UARTs, timers, ADCs, and other peripherals.
### Key Concepts of I/O Memory in Embedded Systems:
1. **Memory-Mapped I/O (MMIO):**
- In MMIO, hardware peripherals are mapped to specific memory addresses in the system's address space.
- The CPU interacts with these peripherals by reading from or writing to these memory addresses, just as it would with regular RAM.
- For example, writing to a specific address might configure a GPIO pin, while reading from another address might retrieve the status of a UART.
2. **I/O Registers:**
- Hardware peripherals typically have a set of registers that control their behavior. These registers are mapped to specific memory addresses.
- Examples of registers include:
- **Control Registers**: Configure the operation of the peripheral (e.g., enable/disable, set modes).
- **Status Registers**: Provide information about the current state of the peripheral (e.g., data ready, error flags).
- **Data Registers**: Hold data being transferred to or from the peripheral (e.g., UART transmit/receive buffers).
3. **Volatile Keyword:**
- In C/C++, I/O memory is often declared as `volatile` to prevent the compiler from optimizing away accesses to these memory locations.
- This is necessary because the value of I/O memory can change at any time due to external hardware events, and the compiler should not assume it can cache or optimize these accesses.
Example:
```c
volatile uint32_t* const UART_STATUS_REG = (uint32_t*)0x4000C000;
volatile uint32_t* const UART_DATA_REG = (uint32_t*)0x4000C004;
```
4. **Accessing I/O Memory:**
- To interact with a peripheral, you read from or write to its mapped memory addresses.
- Example: Reading a status register and writing to a data register:
```c
// Wait until UART is ready to transmit
while (*UART_STATUS_REG & UART_TX_READY) {
// Polling
}
// Send a byte of data
*UART_DATA_REG = 'A';
```
5. **Memory Protection and Privilege Levels:**
- In some systems, access to I/O memory may be restricted based on privilege levels (e.g., user vs. kernel mode).
- Embedded operating systems or bare-metal firmware must ensure proper access to I/O memory to avoid unauthorized or unintended modifications.
6. **Peripheral-Specific Addressing:**
- Each peripheral has its own set of registers and memory addresses, which are defined in the hardware datasheet or reference manual.
- Developers must carefully follow the documentation to correctly configure and use the peripherals.
### Example: GPIO Control
Suppose a GPIO peripheral is mapped to memory addresses starting at `0x40020000`. The control register for GPIO pin 5 might be at `0x40020014`. To set pin 5 as an output and drive it high:
```c
#define GPIO_BASE_ADDR 0x40020000
#define GPIO_CR_OFFSET 0x14
#define GPIO_ODR_OFFSET 0x18
volatile uint32_t* const GPIO_CR = (uint32_t*)(GPIO_BASE_ADDR + GPIO_CR_OFFSET);
volatile uint32_t* const GPIO_ODR = (uint32_t*)(GPIO_BASE_ADDR + GPIO_ODR_OFFSET);
// Set pin 5 as output
*GPIO_CR |= (1

[@RavindraBhandari-nf8vs]

I like your teaching method 🫡