Hi Jay, i miss you as my manager because of bpt... other wise i will be in a good shape under your guidelines, will try to meet you in the future projects... (This is my recognition after seeing all your videos)
Hello sir ,Waiting for matching Techniques sir please post a video for us, and also post a video of all the important concepts in analog layouts please sir thanks for your knowledge.
Can you talk/give references to layout examples of voltage islands? Even for the simple case of digital and analog domains - how is the separation really realized on the IC. Thanks, great video!
So it’s like separate devices which needs 3.3v n 1.8v but in a channel we have all the devices together so won’t this 3.3v trigger a noise and affect the 1.8v device ?? To protect this from happening what are we supposed to do ?? In layout just a guard ring around the device is sufficient ??
Now a days the load is capacitive in nature. Ur right earlier they were keeping 50ohm at every stage; for ex rx. But now only antenna is 50ohm. Rest all blocks are locally impedance matched. Hope this answers
I think it should be signals crossing from one clock domain to another...so they use synchronizers for that....beyond this I have to seek help from others
Core voltage will always be lesser than I/O. Bcos, power consumption is always proportional to square of supply voltage. There is big saving in power. For noise margin reasons the I/O is at higher voltage
14 minutes of this video is equivalent to reading pages together of reference material, Thanks again sir!!
Hi Jay, i miss you as my manager because of bpt... other wise i will be in a good shape under your guidelines, will try to meet you in the future projects... (This is my recognition after seeing all your videos)
Thanks Vijay for feedback.. Analog is small world.. we may cross again in future..
Please do make videos on matching techniques as well! - Big fan ❤️
Sure...thanks
Hello sir ,Waiting for matching Techniques sir please post a video for us, and also post a video of all the important concepts in analog layouts please sir thanks for your knowledge.
Can you talk/give references to layout examples of voltage islands? Even for the simple case of digital and analog domains - how is the separation really realized on the IC. Thanks, great video!
Thanks for the feedback.
Please check my video on AGND, DGND & Isolation.
It will help I guess.
So it’s like separate devices which needs 3.3v n 1.8v but in a channel we have all the devices together so won’t this 3.3v trigger a noise and affect the 1.8v device ?? To protect this from happening what are we supposed to do ?? In layout just a guard ring around the device is sufficient ??
In layout isolation is done by deep n well or n+ or P+ guard ring
Excellent
why do use consider capacitor as load? usually it can be 50 ohms for matching. kindly clarify
Now a days the load is capacitive in nature.
Ur right earlier they were keeping 50ohm at every stage; for ex rx.
But now only antenna is 50ohm.
Rest all blocks are locally impedance matched.
Hope this answers
Hai can you tell me what is the meaning of hand shaking in frequency domain?
I think it should be signals crossing from one clock domain to another...so they use synchronizers for that....beyond this I have to seek help from others
Why the core voltage is less than I/O voltage ? Can't it be same ?
Core voltage will always be lesser than I/O.
Bcos, power consumption is always proportional to square of supply voltage. There is big saving in power. For noise margin reasons the I/O is at higher voltage
Thank u sir
Thank u sir