FPGA #1 - An Overview of Programmable Logic Devices

A look at PAL, PLA, CPLD, and FPGA devices.
You can support this channel on Patreon! / johnsbasement
This video is part of a TH-cam Playlist: • FPGA
My lectures and handout on Boolean Algebra can be found here: faculty.cs.niu.edu/~winans/CS...
Direct links to the lectures are:
• Boolean Algebra (part 1)
• Boolean Algebra (part 2)
My Boolean Algebra handout is here:
github.com/Architecture-And-O...
Music used in this video (Vibe Tracks, Alternate) was downloaded from the TH-cam Audio Library.
#fpga
#ICE40HX

[@velvetsound]

Finally a series on the FPGA that’s going to be for normal humans! Looking forward to this series. Thank you!

[@PebblesChan]

The GAL16V8, GAL20V8 & GAL22V10 (& equivalents) are very useful. They come in DIP packages and are great for all sorts of things including glue logic and decoders.

[@thorpejsf]

...and the 22V10 is still made by Atmel / Microchip (ATF22V10), and there is a completely open-source toolchain available for them (GALasm or Galette + minipro).

[@PebblesChan]

Many presentations including your one excludes the Bipolar Fuseable link PROM such as the National 74S288 / Signetics 82S123 (256 bits arranged as 32x8 bits). It was used in some S100 boards such as the Cromenco SCC & Australian DGZ80 then later in the Australian MicroBee computer. It was easily field programmable by blasting its nichrome fuses by applying +10V on the VCC pins, selecting the desired address to be programmed and applying 63mA (usually 12-18V) to the desired output pins to have their fuses blown. When PALs first came out the manufacturers were secretive about the programming algorithms so expensive programmers needed to be used. I actually had to go to the manufacturer’s offices to program them. Thank goodness in the 1990’s sanity prevailed with the release of GALs which were reprogrammable (but still requiring the use of special programmers).

[@JohnsBasement]

I decided to let this topic go until I explain what a LUT is.. since that is pretty much the same thing.

[@DennoWiggle]

Oooo. Interesting. I'm hoping to learn a lot from upcoming video's on this topic especially when you get hands on and I can follow along.

[@symosys]

Watched FPGA #7 first, then this. Absolutely excellent. I’ve been interested in FPGA’s for a while and looked at various documents and videos. This is by far the best explanation. Looking forward to more and finally being able to start to play, program, simulate and understand these

[@JohnsBasement]

Thanks. I hope I won't let you down!

[@gregorymccoy6797]

Really getting a late start with this video... Looking forward to it. I have always wanted to get into FPGAs.

[@sparkybrit]

Another awesome topic. I’m Looking forward to the rest of the series.

[@JohnsBasement]

Thanks! I look forward to recording it!

[@ami6packs]

actively looking forward to this series

[@JohnsBasement]

Thanks!

[@timgordon2943]

Very well explained, John! I look forward to seeing what magic you weave with my favorite tool the FPGA!

[@JohnsBasement]

Thanks for the kind words & support!

[@jchidley]

I am so glad that I found your channel and this video

[@JohnsBasement]

Thanks for letting me know!

[@PebblesChan]

One thing about modern FPGAs & CPLDs is that they don’t come natively in an inexpensive high gate count 5V low pin count DIP package. Having to deal with BGAs and logic level translators are a real pain in the proverbial!

[@JohnsBasement]

Yeah... mixing voltages is a pain in the arse! We will have to be using level-converters to interface with 5V parts. I posted that video about logic families a few weeks ago to make sure everyone knows about the options we have for level shifting.

[@stevepa3416]

really valuable channel. I got out of school (Computer Science) last year. Got really into networking/OS stuff in school and got a good job. But Ive been really wanting to learn FPGA and logic design work for the purpose of making FPGA based NICs. I managed to grab myself a few alveo u200 boards for cheap online but have had trouble looking for good info to experiment with implementing things on there.
I definitely will come back to this channel periodically.

[@JohnsBasement]

Thanks! It is good to have aboard.

[@jackrubin]

Yes! This is the series I've been hoping for! Monte Dalrymple's book, "Microprocessor Design Using Verilog HDL" might be of interest a bit further down the line, especially since he is Z80-centric (designed the Rabbit CPUs).

[@JohnsBasement]

Thank you for the encouragement!
Thanks for the book tip. I have a copy around here somewhere.

[@jamesross3939]

Looking forward to this series. I'd like to understand these concepts better: when to use wire vs reg, always block parameters, always block with no parameters, blocking vs non-blocking, when to use assignments that are tied to logic in an always block and several other design elements.

[@JohnsBasement]

These are all great questions! I hope I can clarify each one.

[@tombouie]

Thks & I've been trying to figure-out how to start

[@JohnsBasement]

Glad I could help

[@ewetoo]

Great overview. It's wild how early you see these kinds of things on old hardware, especially the later versions of ISA cards.

[@JohnsBasement]

Thanks!

[@TC-zt1sp]

So... on internal input bus (XYZ) in line two from bottom to top, do you have X_+Y_+Z shorted together?

[@JohnsBasement]

If they are all connected to the same input then yes

[@davidgari3240]

At first I thought he was strident and clumsy, but then his logic tied me up and raped me.
Well done, Professor.

[@JohnsBasement]

Not sure how to respond to this.... thanks?