22.10 in Phase Plot the slope will remain constant till 5/RC and not till 1/RC and then the slope will be +45 till 10/RC ...and then zero slope till infinity.
Hi It was good interview. questions are good and thanks for posting it in TH-cam. At time stamp 46:05 really the gain at that node is 0 ? because you have current mirror load is there, if resistor or pmos load is present then that explanation is correct. But here we have current mirror. You can correct me if am wrong. Also procedure for calculating rout seems odd to me but answer is correct. while calculating left side nmos and pmos were not involved. In Razavi (second editionDesign of Analog CMOS Integrated Circuits by Behzad Razavi ) page numbers 152, 153, 154 have simple explanation of Rout calculation. Please correct me if I am wrong.
For the MOSFET Source output question, the output would only be Vdd-Vth, if the Resistance R is strong enough to create a feedback such that Vo/Vi transfer function is a straight line, right? Otherwise |VGS| of the device would be higher than Vth, right?
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22.10 in Phase Plot the slope will remain constant till 5/RC and not till 1/RC and then the slope will be +45 till 10/RC ...and then zero slope till infinity.
Much appreciated sir 😊🫡
Wonderful questions,i like it 😊
this is very helpful! please give more intuitive videos like this!
Hi
It was good interview. questions are good and thanks for posting it in TH-cam.
At time stamp 46:05 really the gain at that node is 0 ? because you have current mirror load is there, if resistor or pmos load is present then that explanation is correct. But here we have current mirror. You can correct me if am wrong. Also procedure for calculating rout seems odd to me but answer is correct. while calculating left side nmos and pmos were not involved. In Razavi (second editionDesign of Analog CMOS Integrated Circuits by Behzad Razavi ) page numbers 152, 153, 154 have simple explanation of Rout calculation.
Please correct me if I am wrong.
Mock interview is benifitial to all
👍👍well done Anish ❤❤
أحسنتم حياكم الله
For the MOSFET Source output question, the output would only be Vdd-Vth, if the Resistance R is strong enough to create a feedback such that Vo/Vi transfer function is a straight line, right? Otherwise |VGS| of the device would be higher than Vth, right?
bring Soumya Kanta Rana mock interview in the next video please bro
I can't interview him ! He is a living legend 🌟
where is your method to solve the thevenin prob ? can you share video link ??
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th-cam.com/play/PLs5_Rtf2P2r6jyxFcmGrQgXLAxlEx4IoM.html&si=Fmi8SEjylrj_twUJ
Awesome
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Why this interview havent covered bjt topics
bjt is outdated technology...mosfet is most usefull