2.5 D & 3D Chips: Interposers and Through Silicon Vias
ฝัง
- เผยแพร่เมื่อ 20 ก.ค. 2024
- Advantages of 3D/2.5D chips. Challenges in making 3D chips using Through Silicon Via (TSV)
Stanford University's class on nanomanufacturing, led by Aneesh Nainani.
Oct 29, 2012
Week 6, Lecture 11, Part 3
One of the best video on 2.5D vs 3D
Great Explanation
Very informative. Much better than reading papers.
It was a good descriptive session and very informative. Thank you for uploading
This is a great presentation, thank you!
Very good and understandable explanation. TSV for Dummies like myself. Thanks for putting it on the i'net.
Very informative ! Thank you.
Excellent Video
Where can I get the latest advancements in this field? Thanks again for this lecture
nice presentation