Wow for a 5 year old video, sir that was very good, it helped me a lot. The only problem that I had was the audio volume was too low, but not a big issue. I did have some issues with Quartus Prime switching from ??? to WSL to create the make file. I had to load in some Ubuntu update to my Windows 11 system. Also, I'm using a DE0 Nano which has a different FPGA than the one you used. I had some pinout mistakes that were causing problems. I also didn't get the reset and clock hooked up right initially. Anyway... I did get the "Hello from Nios II!" message from my hardware, finally! So, I'm happy for now. Thanks a lot.
Thank you very much Sir for this amazing tutorial, by far the best I have come across so far. Only suggestion is, if you are planning to do more such tutorials, which I hope is the case, can you please increase the audio volume? Thanks a lot again.
I encounter the error "Error: Computer_Slave_0: Computer_Slave does not support generation for Verilog Simulation. Generation is available for: Quartus Synthesis. " as generating testbench from flatform designer for simulation. Computer_Slave is a module I added into system, and other modules added that have similar error. Help me fix it. Thank you so much
The hello world application is running from RAM. When you hit the reset button it just starts the program over again. The ram stays the same following a reset. If you cycle power, you would have to reload the program again.
Hi Siva! I'm using Altera MAX10 NEEK board and have some issues with downloading the program into MAX10 NEEK board. The target hardware does not respond and fails to print out "Hello world" on the Nios II console. "Downloading ELF process failed" is the message that I get. Do you have any idea what the problem may be? Thanks in advance!
I got the same message, but, when I configured the clock and reset pins correctly... that message went away. For me, that message was saying "JTAG is not working because there is no clock signal?". (I know, I'm answering a 4 year old question and that you probably don't care anymore.)
@@terrycarpenter4733 I have a De0-Nano, and got the same error and was looking for some answers. Now that I found this solution of yours, I will try it. I will write again after trying.
Sir during IO assignments, you have added a csv file. How to add/write IO pins into that file. Plz show the contents of that file. Can you pin it here for reference
Wow for a 5 year old video, sir that was very good, it helped me a lot. The only problem that I had was the audio volume was too low, but not a big issue. I did have some issues with Quartus Prime switching from ??? to WSL to create the make file. I had to load in some Ubuntu update to my Windows 11 system. Also, I'm using a DE0 Nano which has a different FPGA than the one you used. I had some pinout mistakes that were causing problems. I also didn't get the reset and clock hooked up right initially. Anyway... I did get the "Hello from Nios II!" message from my hardware, finally! So, I'm happy for now. Thanks a lot.
Thank you very much Sir for this amazing tutorial, by far the best I have come across so far. Only suggestion is, if you are planning to do more such tutorials, which I hope is the case, can you please increase the audio volume? Thanks a lot again.
Very good video sir
I encounter the error "Error: Computer_Slave_0: Computer_Slave does not support generation for Verilog Simulation. Generation is available for: Quartus Synthesis. " as generating testbench from flatform designer for simulation. Computer_Slave is a module I added into system, and other modules added that have similar error. Help me fix it. Thank you so much
You are my hero bro!
Thank you,
But how did you get the "hello from nios" for the 3rd and 4th times ? by reset ? but you did not burn the application into flash! Thanks
The hello world application is running from RAM. When you hit the reset button it just starts the program over again. The ram stays the same following a reset. If you cycle power, you would have to reload the program again.
Hi Siva!
I'm using Altera MAX10 NEEK board and have some issues with downloading the program into MAX10 NEEK board. The target hardware does not respond and fails to print out "Hello world" on the Nios II console. "Downloading ELF process failed" is the message that I get. Do you have any idea what the problem may be?
Thanks in advance!
I got the same message, but, when I configured the clock and reset pins correctly... that message went away. For me, that message was saying "JTAG is not working because there is no clock signal?". (I know, I'm answering a 4 year old question and that you probably don't care anymore.)
@@terrycarpenter4733 I have a De0-Nano, and got the same error and was looking for some answers. Now that I found this solution of yours, I will try it. I will write again after trying.
thank you sir
Thank You Sir.
Sir during IO assignments, you have added a csv file. How to add/write IO pins into that file. Plz show the contents of that file. Can you pin it here for reference
Can i find link dowload where?