@@husseinkj1269Like here (using D flip-flop in the video), the output of one flip-flop is connected to input of the next stage. So, in that case, also , the output of the previous state can be connected to the one input of XOR gate. I hope, it will clear your doubt.
@@ALLABOUTELECTRONICS yes i did it in multisim but the result different in T flip flop i hope to communicate with you to send the picture if you have a time
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The most rare video on online sites and you explained it amazingly, thank you so much 👌🏻👌🏻👍🏻
thank you bro ...I am watching your videos since i joined college....EEE,EIE,DSD
which simulation tool is used in this video??
Deeds circuit simulator
Just superb
sir for kmap for function f how we use dont care terms
I have already shown in examples 1 and 2, how the don’t care terms can be used to minimise the expression.
How solve this using T flip flop
You need to convert T flip-flop in D flip-flop (using XOR gate).
Here is the link for the conversion: th-cam.com/video/iAEgeuIoEBQ/w-d-xo.html
@@ALLABOUTELECTRONICS ok but what the value of the input d
@@husseinkj1269Like here (using D flip-flop in the video), the output of one flip-flop is connected to input of the next stage. So, in that case, also , the output of the previous state can be connected to the one input of XOR gate. I hope, it will clear your doubt.
@@ALLABOUTELECTRONICS yes i did it in multisim but the result different in T flip flop i hope to communicate with you to send the picture if you have a time
pulse train generator kya hota hai
can you pls share the code you used for simulation here?
It is same as the code used in example 1.
op man