Johnson Counter | 4 Bit Johnson counter using DFF | Twisted ring counter | Switch tail counter

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  • เผยแพร่เมื่อ 2 ต.ค. 2024
  • #digitalelectronics
    #digitalsystemdesign
    #counter
    #dsd
    Johnson Counter using D flip flop
    #applicationofshiftregister#dsd
    switch tail ring counter
    Johnson counter is an application of shift register
    this is also called twisted ring counter
    in this compliment output of last flip flop fed back to the input of first flip flop.
    an n bit Johnson counter can count 2n states while n nit Ring counter can count only n states
    link for Ring Counter
    • U3 L6 | Ring counter |...
    link for Johnson counter using JK FLIP FLOP
    • U3L7 |Johnson Counter|...
    if u like the video
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ความคิดเห็น • 19

  • @shivtejdeshmukh130
    @shivtejdeshmukh130 2 หลายเดือนก่อน

    you are the best out there among many teachers.... I know because I've watched almost everyone, you ma'am are just best 🙏🏻

  • @palsahab127
    @palsahab127 3 ปีที่แล้ว +1

    Thanks for your concern mam, for our study.

  • @ashishsavaratkar3418
    @ashishsavaratkar3418 ปีที่แล้ว

    Mam how to design Johnson counter for initial state 0110

    • @TechnoTutorials2783
      @TechnoTutorials2783  ปีที่แล้ว

      If u want to Initialize then u can use a initial pulse like ring counter and connect clear of 1st and last flip flop and preset of 2 and 3 ff to that pulse
      One more thing after each clock 1st and last flip flop will not hold same value bcoz input of 1st connected with complemented output of last

  • @igaming_
    @igaming_ ปีที่แล้ว

    Do i need to make clr=1 in the second step

  • @ANUSH_STUDIO_
    @ANUSH_STUDIO_ ปีที่แล้ว

    What about 3 bit

    • @TechnoTutorials2783
      @TechnoTutorials2783  ปีที่แล้ว

      There will be 3 flip flop and inverted output of last flip flop connected to the input of first ff

    • @ANUSH_STUDIO_
      @ANUSH_STUDIO_ ปีที่แล้ว

      @techno tutorials ( e-learning)

    • @ANUSH_STUDIO_
      @ANUSH_STUDIO_ ปีที่แล้ว +1

      Okay ma'am

  • @metalhead3908
    @metalhead3908 3 ปีที่แล้ว

    what will be the state of twisted ring after 4th clock pulse if is initial stage is 1001001?
    ih that 1001001 clock pulse which need to be changed according to stage??

    • @TechnoTutorials2783
      @TechnoTutorials2783  3 ปีที่แล้ว

      clk data
      initial 1001001
      1st 0100100
      2nd 1010010
      3rd 1101001
      4th 0110100

    • @metalhead3908
      @metalhead3908 3 ปีที่แล้ว

      @@TechnoTutorials2783 thanks. Can you make video 0n 5 bit sequence recognizer with table and time graph

    • @TechnoTutorials2783
      @TechnoTutorials2783  3 ปีที่แล้ว

      @@metalhead3908 ok

    • @TechnoTutorials2783
      @TechnoTutorials2783  3 ปีที่แล้ว

      If possible send me the question

    • @metalhead3908
      @metalhead3908 3 ปีที่แล้ว

      design sequence recognizer with state diagram and table to recognize 11001 pattern