Is it correct to say that when you want to write a new value into just ONE particular cell, you must first read ALL of the cells connected to the same word line (into the sense amplifiers), so that you can set the bit lines to the appropriate values, then effectively write everything back again?
I think you dont care about current value in cell. For example, if you want to write a ‘1’ on a: Current State ‘0’ - Driver is strong enough to pull this ‘0’ to a ‘1’ Current State ‘1’ - No change.
Yes, I think you are correct. Whenever you write to a wordline, you overwrite each SRAM cell in that row, so to change just one, you would need to read the row first to know their values.
So for the question posted during the write operation. Are the transistors designed that way to prevent the cell values from storing 1 on both sides?? also when i draw this operation out by hand and put 1 at each bitline, i see that the values of the cell do not change (because bitline GND overpowers cell Vdd and bitline Vdd doesnt overpower cell GND). But when i use 0 at both bitlines it appears to set both sides of the cell to 0. how does this respond when that cell is read and both appear to drop?? I theorize that the drops are similar throughout the read operation and the sensor amplifier doesnt pick up any change, so if thats the case would it be 0? is there actually another component involved for such cases? or am i completely lost?
I would guess that the drivers are set up so that they cannot both be 0 at the same time, but if that happened, the cell value would not be predictable. The cell cannot remain in a state of 0 0, since then both inverters would output 1 and it would not be in 0 0 anymore. I'm not sure if the cell would oscillate between 0 0 and 1 1, or if one of the inverters would be faster than the other and get the cell to a 0 1 or 1 0 state.
@@erikumble If your latter theory is right, maybe this would be a good random number generator! Maybe not because maybe certain cells would more prone to swinging to 1 0 and others 0 1. Minute differences between these tiny transistors might facilitate the cell settling in one state over the other most of the time. Interesting thought though.
Is it correct to say that when you want to write a new value into just ONE particular cell, you must first read ALL of the cells connected to the same word line (into the sense amplifiers), so that you can set the bit lines to the appropriate values, then effectively write everything back again?
I think you dont care about current value in cell. For example, if you want to write a ‘1’ on a:
Current State ‘0’ - Driver is strong enough to pull this ‘0’ to a ‘1’
Current State ‘1’ - No change.
Yes, I think you are correct. Whenever you write to a wordline, you overwrite each SRAM cell in that row, so to change just one, you would need to read the row first to know their values.
So for the question posted during the write operation. Are the transistors designed that way to prevent the cell values from storing 1 on both sides?? also when i draw this operation out by hand and put 1 at each bitline, i see that the values of the cell do not change (because bitline GND overpowers cell Vdd and bitline Vdd doesnt overpower cell GND). But when i use 0 at both bitlines it appears to set both sides of the cell to 0. how does this respond when that cell is read and both appear to drop??
I theorize that the drops are similar throughout the read operation and the sensor amplifier doesnt pick up any change, so if thats the case would it be 0? is there actually another component involved for such cases? or am i completely lost?
I would guess that the drivers are set up so that they cannot both be 0 at the same time, but if that happened, the cell value would not be predictable. The cell cannot remain in a state of 0 0, since then both inverters would output 1 and it would not be in 0 0 anymore. I'm not sure if the cell would oscillate between 0 0 and 1 1, or if one of the inverters would be faster than the other and get the cell to a 0 1 or 1 0 state.
@@erikumble If your latter theory is right, maybe this would be a good random number generator! Maybe not because maybe certain cells would more prone to swinging to 1 0 and others 0 1. Minute differences between these tiny transistors might facilitate the cell settling in one state over the other most of the time. Interesting thought though.
Is it possible to explain how to design a 6T sram cell to do both read and write operation ?
Here is a diagram from wikipedia: en.wikipedia.org/wiki/Static_random-access_memory#:~:text=Programmable%20Logic%20Device-,Design,-%5Bedit%5D
Not Smart enough for this lol