The impact of scaling on Analog Design
ฝัง
- เผยแพร่เมื่อ 27 เม.ย. 2017
- Channel lengths of standard CMOS technologies continue to shrink, as predicted by Moore. Consequently, amplifiers and filters require the biasing points of the transistors to move deeper in weak inversion. The resulting speed is reduced considerably. New design techniques are required to establish the optimum current levels. They can easily be derived for single- and two-stage amplifiers. For channel lengths below 20 nm, a unique optimum can be found.
At such low channel lengths noise and distortion establish severe limitations in dynamic range. They can be mitigated by the use of design techniques such as negative resistors and bootstrap techniques. An overview is given of such circuit configurations.