Return Paths | Mixed Signal PCB Design: Part One
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- เผยแพร่เมื่อ 17 พ.ค. 2024
- One of the fundamental aspects of any circuit diagram is the return current path. In a circuit diagram and a schematic diagram, the path that electric current follows to return to the low potential side of a power source should be obvious, but it may not be so obvious in a PCB.
0:00 Intro
1:16 How Signals Travel on Traces
2:30 What Is a Displacement Current?
3:45 Examining Signal Return Paths
4:51 Analogue Vs. Digital Signal Return Paths
7:49 The Goal in Mixed Signal Design
8:44 Return Current Paths for Different Frequencies
9:36 Outro
For more Mixed Signal PCB Design videos, click here: • Mixed Signal Design
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Transmission Line Articles on Altium's Website:
- Transmission Line Impedance: The Six Important Values: resources.altium.com/p/transm...
- Why Impedance Matching is Important in a Transmission Line: resources.altium.com/p/why-im...
Resistive vs. Inductive Return Current Paths by Bruce Archambeault, Ph.D., IEEE Fellow: www.emcs.org/acstrial/newslet...
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I love this channel and I think this the only channel that I always check the description for more info.
*Thank you, we are waiting for the second part!*
I will share these with my analog club at the University of Texas.
Super exited!!
That is very good advice to separate the signals and keep one solid ground plane. I once had a board that had split ground planes for digital and analog. The board was well separated between digital and analog and worked well, however it had problems with ESD. When the splits were eliminated and just a single solid ground plane was used it never had trouble with ESD again.
That's interesting, I have not talked about uniform GND plane benefits in terms of ESD prevention, but now that I think about it this makes sense, I normally bring up ESD in terms of a broader grounding strategy. Were you getting ESD between the two ground regions? I could see that happening if, for example, the two ground reference were floating and had a large offset with respect to each other, and if there is bad noise control in the supplies the lowest impedance path between the two ground references would be a discharge.
@@Zachariah-Petersonthey don't even need an offset if there's any cross between them., for example a digital signal to control an analog transistor to switch because how are you going to turn it off and on otherwise? You end up with a dipole antenna, signals coupling or traveling transversely along the edges of the separation to reach whatever connection point there is. It's all in fields, not the copper. Signals are fields coupled TO the copper.
Thanks!
thank you so much . it almost took me half an hour to absorb the contents of this video
Glad it helped!
Thanks for sharing your information!
Glad it was helpful!
Awesome!
Thank you sir
Analog signals at very low frequencies will spread all over the entire board, no matter how far away you separate them.
Even out of and into connectors unintentionally.
I have my own strategies of how to design, for example, an audio sound card (high speed digital + audio analogue signals).
But, I would love to hear Zach's approach on how to get around this - he mentioned via stitching or something, but this won't help.
These approaches work for separating 2 x High-Speed signals, not 1 x High-Speed and 1 x Low-Speed.
Low-frequency analogue signal return currents will spread all over the board, all over! So, keen to hear how we can counteract crosstalk from this :)
Crosstalk, ground bounce maybe better said, where the digital signal is the victim? I don’t think this would be a big problem.
Define high and low speed, and "very low". How do they get there? I can't couple into other areas if you give them a proper return path. How are you saying they couple into everything regardless? By what mechanism?
awsome!
Thank you! Cheers!
Can you share the topic of the paper by Bruce Archambeault you mentioned in the video? Thanks.
Here's a link to the PDF: www.emcs.org/acstrial/newsletters/fall08/tips.pdf
❤
In a mixed signal board is that analog signal effect digital signals or digital effect analog?
Both! Digital signals in saturation logic circuits are less susceptible to noise from analog unless logic levels are low and/or the analog signal that creates crosstalk is running at high power. Digital signals create strong spikes in an analog signal that will interfere with analog components as these spikes appear as additional frequency content.
In digital signals (mostly train of similar or dissimilar pulses) we can have both high frequency parts and low frequency parts added up together. So here, why we just considered the high frequency parts' effect and ignored the return path of low frequency parts in a digital signal?
Thank you for great contents👌
From my understanding, because the digital signal contained both high and low frequency part in it that's why he didn't consider the return of low frequency part because the principal frequency and harmonics move together also the circuits are high speed circuits that have fast rise time the lower frequency signals have low rise time so no need to discuss signal integrity issues.
If there is a capacitive coupling between ground plane and trace carrying high speed signal then we have ground bounce on the return path shouldn't we increase the distance between ground plane and trace to avoid it?
Ground bounce (Sometimes called simultaneous switching noise) is not caused by capacitive coupling between the trace and ground plane. Ground bounce is due to inductance along the signal path when a signal switches states (inductance comes from the trace, I/O leads, GND/PWR leads, and any vias in that signal path). The inductance causes a back EMF that increases the GND potential as measured at the I/O pin. Because the I/O buffer circuit and the I/O + trace capacitance exist along this signal path, we will have an RLC circuit with low resistance. This means when the I/O buffer is excited and switches states, the fast edge rate will cause an underdamped oscillation with relatively high frequency. This is the reason you can sometimes see ringing on the rising edge of a fast digital signal.
@@Zachariah-Peterson But whenever a driver circuit drives a signal on signal trace to receiver circuit, that signal returns back to driver circuit through return path(can be beneath ground plane or a ground trace) so i was asking in both scenarios capacitive coupling of signal trace with the ground trace and inductive coupling of signal trace with the ground plane, we got increased return current on return path due to back emf. If my understanding is correct then doesn't the additional current on return path due to back emf contributes to more noise and other sort of issues.
There is not additional current in the return path, the total current in the circuit includes what would be measured along that return path. The path followed by the return current defines the inductance of that circuit carrying the current, and that determines how easily it can couple noise to another circuit as well as receive noise from another circuit. The same idea applies to capacitive coupling of noise. If that path is not well-defined, then it's possible to have problems with crosstalk, radiated EMI, conducted EMI, or all of these simultaneously.
@@Zachariah-Peterson I understood what you are saying and because of that inductance we should have a small return path but i am asking when a high frequency signal or digital signal with very fast rise time passes travels on a transmission line it will generate magnetic field lines and because of having a tight ground plane those field lines will couple with the ground plane but because the signal is time changing signal so magnetic field will be changing and because of that in ground plane current will induce so what will happen to that current? Will that current be added to the returned signal current?
@@ahsanalirafaq805 The reason we get a particular magnetic field distribution around a trace is because of the current in the signal and the return current from the signal. If you are looking at this from the digital perspective, assuming the gain provided by any I/O buffer circuit is = 1 then the return current is the same as the signal's current. If you think of a load as connecting the signal line and the ground plane, then the return current is still the same as the signal current. Remember from Kirchoff's current law, the current along a particular loop is the same no matter where you measure it.
where is this idea of "low frequency analog current will spread over the board" come from?
what is the theoretical basis of that?
As far as i know, the current distribution on the return path (reference plane) is controlled by the substrate height, trace width, and dielectric constant. There should not be any dependence on frequency.
There are simulation results you'll find that show this. I believe there is a reply to another comment in this video with an IEEE article showing some results. The theoretical basis is due to the higher impedance seen by capacitively coupled return current from the trace to the plane. So at lower frequencies, the return current would have to couple via conduction and would prefer to follow paths with lower resistance. Theoretically this would be a straight line, but of course charge repels itself and thus spreads out in the plane. Combine weak capacitive coupling and stronger resistive coupling and you don't have the return current closely following the trace anymore, and it can spread out in the ground plane. That doesn't mean the current is distributed evenly across the entire board and I didn't intend to communicate that, but it does spread out in the GND plane, which might be in a region that's not near the trace supplying the signal.
@@Zachariah-Peterson thanks for the incredibly prompt response. I will look more into those reference you mentioned.
Regards
There are many excellent videos from Altium (Hartley, Webb) about the theory and what NOT to do. Many repeat the same things over and over again.. What is quite missing videos HOW to do. Take for example a simple circuit with a few components., mixed power , 3 power rails (3V, 5V, 9V) and multiple LED that all take 9V supply and driven by 3.3 V logic fed from an IC powered by a 5V to 3.3 regulator add several simple SMD IC's. Now go and apply all the rules correctly without traces crossing planes.You will find for a such a simple design 4 layer is almost not possible without some violations or you need a much bigger board than is practial.No wonder commercial designs use a huge amount of layers (who can afford the cost). With lower layer counts (lower cost) , the worry comes... will I it pass EMI with these violations ? Multiple layers means many ground via's to avoid EMI issues. Mostly the solution brought up is "add layers". Theory is nice but where are the practical examples of violations and their impact and how to solve ? How many ground via's needed, for what frequencies.. where to place them ? how far can violations go ? Should I use a power plane split up in difference planes areas or route the power with traces ? Am I perhaps worrying to much ? etc.. many questions...
Hi Debugging, I understand the frustration and, oftentimes, the apparent lack of clear direction. What I can say is that any PCB layout will have many competing requirements and it's impossible to objectively determine the "best" design in every situation. My hope is that in these videos we can make our guidelines more actionable instead of focusing on what people do wrong. Thanks for watching!
I think its difficult to bridge these things. What these videos do is giving broad understanding about fundamentals. Particulars are so infinitely varied that its almost useless to demonstrate them. Of course it would be a good idea to use particular samples in some situations but this will then become much more time consuming and I assume more expensive to produce as a content. Becoming “perfect” electronics designer is lifelong exercise which still ends with failure :)
Hey Zach... change your altium page picture ! You look too old in there ! ;)
LOL! I guess I was trying to look distinguished? I need to get new headshots...