I did the same thing and I got the clearance problem pad to top layer and region. I prefer not to waive the DRC and solve it fundamentally. I had the same problem in Cadance PCB editor. PAD and top layer copper should not collide. The whole shape should be a pad in Cadence and I think here needs the same treatment.
Thanks John well explained.
Hi John, thank you so much for this information, really helped me to understand. Was looking for this exact topic and your video is perfect. 🙂
Nice work, detailed explanations.
very helpful
Can you link to a reference for the hot keys you use for changing settings and modes?
I did the same thing and I got the clearance problem pad to top layer and region. I prefer not to waive the DRC and solve it fundamentally. I had the same problem in Cadance PCB editor. PAD and top layer copper should not collide. The whole shape should be a pad in Cadence and I think here needs the same treatment.