I2C Protocol - Part 2 (Bus Arbitration & Clock Stretching)

Do Check Part 1 which covers the basics of I2C: • I2C protocol Basics - ...
Part 3 will include details regarding the Hardware design.
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SPI Protocol: www.youtube.com/watch?v=aHGSu...
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[@matheusbg8]

I liked your video Congratulations!
Regarding your question:
I think both masters will receive the data at the same time, and no one will be aware of each other. That is so cool :). An example could be 2 masters accessing the same RTC module.
Cheers!

[@more_u-listen_more_u_love9543]

Really video is awesome. Thanks for good quality of info on i2c.

[@BinaBhatt]

Thank you!

[@shlokasworld2626]

good work

[@puja2078]

Hi Very nice video, Thankyou. I have few doubts
1. What if 2 master one tries to read and other tries to write to same slave? I believe one trying to write will win the arbitration is it so?
2. For your question will acknowledge from slave will be received by both the maters?
3. During clock stretching can we consider slave will have control over master clock, even master generates clock? Will wait for your answers.

[@tedsdroneworld558]

Doesn't each master have to monitor both SDA and SCL to arbitrate such that they make sure SCL is actually high before checking the SDA state - you know incase another master is still holding SCL low?

[@hpmaity4919]

what if there is a no recovery form the clock streaching,
what if the slave is not responsive?

[@chinmaygupta7482]

Video is really good. Can you please give answer for the question asked in the end ?

[@BinaBhatt]

The data transfer will be carried on without any error as both the masters are attempting to send the same bits.
Also, arbitration is continued throughout the complete data transfer.

[@thepainfultruthoftheworld6751]

Answer for the last question,
I think both the address will go to conflict by consuming the same bus so clock arbitration will occur untill it is programed to let the bus pass through the data if the addresses send the same data, 🥵😌 this is my try, and try to fix it and i want your answer.

[@tharunkumarsankula1390]

could you please tell me the answer for the last question !!

[@charankaja6096]

What happened when speed of master is more than speed of slave.

[@prasenjit134]

Is there a next video after this?

[@BinaBhatt]

Yes, here is the link: th-cam.com/video/kLrInNkEkcg/w-d-xo.html

[@shripad_4]

Answer- No corruption of data.

[@ThipparapuVijaykumar]

If 2 masters want to access same slave at a time,
Case1: If both the masters want to read same register of slave, then data will be received by both the masters.
Case2: if bothe the masters want to read different Registers of slave then again bus arbitration will happend.
Case3: same thing will happen for write operation also.