@kavita Clock stretching, sometimes referred to as clock synchronization, is a mechanism used by an I2C slave to notify the master to slow down the clock speed. I2C devices can slow down communication by stretching SCL: During an SCL low phase, any I2C device on the bus may additionally hold down SCL to prevent it from rising again, enabling it to slow down the SCL clock rate or to stop I2C communication for a while. This is also referred to as clock synchronization. This situation may happen when the slave is waiting for its internal operation to finish, such as EEPROM read/write, sensor data calculation, internal state machine to settle down, and so on. The master, on the other hand, is required to read back the clock signal after releasing it to the high state and wait until the line has actually gone high. As described above, to implement clock stretching mode (a.k.a blocking mode) in a master side, it is required to read back the SCL after releasing it to the high state, and wait until the line has actually gone high. If you are using a I2C controller as a master, the clock stretching is usually handled by the I2C controller in hardware level. But if the master communicates with the slave via GPIO, it needs to be accomplished in software level (driver code).
Hey, your explanations are very nice and clear. I have a question, in your example you gave a situation where two masters want to send information to two different slaves but what happens when two masters want to send information to the same slave which master gets priority? And why? , Thanks.
I have the same question. I am guessing it will keep on comparing or checking the SDL line even after the slave address and if there is a difference in the address of the internal register address for both microcontroller then priority might be given on that basis. And if the register address is also same then both will receive the same data they requested and if they are writing then again there will be comparison i think this is how it must work. Not sure though!
hi Foolish Engineer, since one year you don't answer the question: I have a question, in your example, you have a situation where two masters want to send information to two different slaves but what happens when two masters want to send information to the same slave which master gets priority? And why?. easily you can say that you don't know🤔
Hi Srv Vinodh, You find the product as per requirement on this site: www.sevcon.com/ I have used their controller in my career and I have good feedback about it.
@Shreya Thanks for your question. Can you please elaborate more? What is your project and which speaker are you talking about? If you give us the link or name of such speaker we can help you further. Thanks
Nice Video, Thank you for providing more clear about Bus Arbitration
tech.
Hi, excellent video, but I have one query : which master supplies the clock?
whichever master wants to talk on the bus
Can there be a case where the master trying to read lower address slave is given priority and the higher address read is stuck waiting?
Helpful! Thanks for posting
Glad it was helpful!
Hi Akshay.... Here I am facing same problem of scl pulling low in i2c bus...
How can I use clock streching technique at my code, please explain
Please send us your code and entire description on foolishengineer7@gmail.com
Our teammate will help you
@kavita
Clock stretching, sometimes referred to as clock synchronization, is a mechanism used by an I2C slave to notify the master to slow down the clock speed.
I2C devices can slow down communication by stretching SCL: During an SCL low phase, any I2C device on the bus may additionally hold down SCL to prevent it from rising again, enabling it to slow down the SCL clock rate or to stop I2C communication for a while. This is also referred to as clock synchronization.
This situation may happen when the slave is waiting for its internal operation to finish, such as EEPROM read/write, sensor data calculation, internal state machine to settle down, and so on.
The master, on the other hand, is required to read back the clock signal after releasing it to the high state and wait until the line has actually gone high.
As described above, to implement clock stretching mode (a.k.a blocking mode) in a master side, it is required to read back the SCL after releasing it to the high state, and wait until the line has actually gone high.
If you are using a I2C controller as a master, the clock stretching is usually handled by the I2C controller in hardware level. But if the master communicates with the slave via GPIO, it needs to be accomplished in software level (driver code).
Hey, your explanations are very nice and clear.
I have a question, in your example you gave a situation where two masters want to send information to two different slaves but what happens when two masters want to send information to the same slave which master gets priority? And why? , Thanks.
@user-md3fu8iu4x your answer is not correct, at least you must understand the question.💩
I have the same question. I am guessing it will keep on comparing or checking the SDL line even after the slave address and if there is a difference in the address of the internal register address for both microcontroller then priority might be given on that basis. And if the register address is also same then both will receive the same data they requested and if they are writing then again there will be comparison i think this is how it must work. Not sure though!
The bus arbitration logic will take place at address or data phase itself.
what if there is a no recovery form the clock streaching,
what if the slave is not responsive?
Very clear explain
Thanks for liking
@Foolish_Engineer can you post video for AMBA AXI protocol.
Will using fast mode if 400 Khz consume more power, we are readint sensor data at 100, but battery power is also important
Yes, thanks for the input
small correction, 5. Bus top(not l)ology
Good work man
Thank you so much, Glad you liked it!!
Nice explanation
Thank you so much for watching!! Please don't forget to subscribe to our channel
can you please do i3c as well
Is there a posibility to communicate from one I2C master to another I2C master?
Yes we can, It is difficult but posibble
hi Foolish Engineer,
since one year you don't answer the question:
I have a question, in your example, you have a situation where two masters want to send information to two different slaves but what happens when two masters want to send information to the same slave which master gets priority? And why?.
easily you can say that you don't know🤔
I don’t know
@Foolish Engineer Can you one video on Programming view for I2C communication ?
Sure, working on it.
HI FOOLISH ENGINEER
WE are working on our project of developing hybrid e-vechile
shall u help us in selecting controller
Hi Srv Vinodh,
You find the product as per requirement on this site:
www.sevcon.com/
I have used their controller in my career and I have good feedback about it.
how i2c will work for changing sound volume in intelligent speakers.
@Shreya
Thanks for your question.
Can you please elaborate more?
What is your project and which speaker are you talking about? If you give us the link or name of such speaker we can help you further.
Thanks
Brother you can make Hindi language video
yeah
Can protocol
Yes! I am working on it