SR Latch using NAND Gate | NAND SR Latch | Digital Electronics

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When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR or NAND logic gates. The stored bit is present on the output marked Q.
The inputs are generally designated S and R for Set and Reset respectively. Because the NAND inputs must normally be logic 1 to avoid affecting the latching action, the inputs are considered to be inverted in this circuit (or active low).
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Sir in this the inputs of s and r the values of previous state,so while calculating at r the input u hv given is present value not previous value of q ,whyy

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You need to assign s to r and r to s as s indicates set and r indicates reset, so Q(n+1)=1 when s=1 r=0 and Q(n+1)=0 when r=1 and s=0.

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