Hi Arnabbrata, I'm not sure what you are asking, as I believe that this is exactly what is explained in this lecture. While I use Virtuoso and Spectre for my examples, any SPICE-type simulator (such as LTSpice) works the same. If you want to learn more about how SPICE and Spectre work, I recommend watching my video series about this (the first part can be found here: th-cam.com/video/1ZhzhWAt7xc/w-d-xo.html)
Hi Mukku, I don't have exact data on this - it is also probably not something that the fabs like to release. In general, the SNM is very dependent on the actual transistor models of the SRAM cells, which are special transistors (they are not "standard" NMOS and PMOS, but rather special transistors created with "pushed design rules" that only the foundry supplies). That being said, it is generally proportional to VDD, so if your VDD scales, your SNM will scale along with it.
A VTC is the "Voltage Transfer Characteristic (or Curve)" of a logic gate. It is basically a DC sweep from 0 to VDD on the input showing the DC operating point voltage of the output. You can find a full explanation in my "Digital Electronic Circuits" course in these slides: www.eng.biu.ac.il/temanad/files/2018/02/02-Terminology-annotated.pdf (unfortunately, I only have the accompanying video recorded in Hebrew).
I've been loving your videos, but this is not one of them. There's a lot going on in the circuits and sometimes you're not precise in what you're talking about making it hard to follow.
@@AdiTeman I saw the SNM response through VTC by increasing width of a pull-down transistors. It really impacts.. but this may leads to get increases the layout width.. how can we maintain this
I guess this is the "no free lunch" principle. SRAM cell engineering is something that Foundries put a lot of effort into for exactly these reasons, and many, many pages of research publications have been written about them.
How to put butterfly model of SNM in LTSPICE
Hi Arnabbrata,
I'm not sure what you are asking, as I believe that this is exactly what is explained in this lecture. While I use Virtuoso and Spectre for my examples, any SPICE-type simulator (such as LTSpice) works the same.
If you want to learn more about how SPICE and Spectre work, I recommend watching my video series about this (the first part can be found here: th-cam.com/video/1ZhzhWAt7xc/w-d-xo.html)
what is the relation between transistor technology node to SNM. i.e., 180nm,90nm,45nm,18nm how these will vary the SNM
Hi Mukku,
I don't have exact data on this - it is also probably not something that the fabs like to release. In general, the SNM is very dependent on the actual transistor models of the SRAM cells, which are special transistors (they are not "standard" NMOS and PMOS, but rather special transistors created with "pushed design rules" that only the foundry supplies).
That being said, it is generally proportional to VDD, so if your VDD scales, your SNM will scale along with it.
@@AdiTeman thanks sir.. really appreciable work u done through videos....
What is VTC?
A VTC is the "Voltage Transfer Characteristic (or Curve)" of a logic gate. It is basically a DC sweep from 0 to VDD on the input showing the DC operating point voltage of the output.
You can find a full explanation in my "Digital Electronic Circuits" course in these slides: www.eng.biu.ac.il/temanad/files/2018/02/02-Terminology-annotated.pdf
(unfortunately, I only have the accompanying video recorded in Hebrew).
I've been loving your videos, but this is not one of them. There's a lot going on in the circuits and sometimes you're not precise in what you're talking about making it hard to follow.
Sorry about that. I hope my new lectures are more clear.
while writting how we maintain Pullup ratio
Pull up (and pull down) ratio is a property of the cell sizing. As explained in the lecture, to maintain the correct functionality, you need K(PUN)
@@AdiTeman I saw the SNM response through VTC by increasing width of a pull-down transistors. It really impacts.. but this may leads to get increases the layout width.. how can we maintain this
I guess this is the "no free lunch" principle.
SRAM cell engineering is something that Foundries put a lot of effort into for exactly these reasons, and many, many pages of research publications have been written about them.
@@AdiTeman yes offcourse... I am doing my research work on that.. anyhow thanks mate for ur support...