MeganWachs - Keynote RISC-V and FPGAs: Open Source Hardware Hacking

The software world has fully embraced open source as a way to move forward together, faster. The hardware world is rapidly catching up, but until recently, one building block was still proprietary: the CPU's Instruction Set Architecture, or ISA. The ISA is the language that the computer speaks, and aligning on a common language enables both open hardware implementations and collaboration on software tools. RISC-V is a free and open ISA which is revolutionizing both academic research and the semiconductor industry. In my talk I will give an intro to RISC-V and explain how it is enabling a new level of hardware hacking, on FPGAs and beyond.
Read the article on Hackaday:
hackaday.com/?p=395529

[@AhmedDeedatPalestine]

the power of risc v is unimaginable

[@IvanTheChemist]

I am so hyped about getting an Open Source ISA and really looking forward to RISC-V based products.

[@thedarkpill3590]

Same here bro. One of the best things to come about and people are sleeping

[@andrewlankford9634]

Man, every time I hear "ISA", I keep thinking of a 286 class pc.

[@czos9239]

What does ISA get you? A slot for your soundcard w/ a gameport.

[@peepzorz]

Great talk, thanks for sharing.

[@unknown8088928]

Super cool stuff, great presentation

[@julianmiglio8288]

Very interesting. Thank you very much for the presentation

[@Sluggernaut]

Fantastic!

[@esra_erimez]

MMIX is a 64-bit RISC architecture designed by Donald Knuth. It is an open standard.

[@norm1124]

Cool, thank you!

[@jafinch78]

Neat presentation. Awesome to see another smart young lady.

[@PauloConstantino167]

all women in tech are male like.

[@PetrGladkikh]

"one building block was still proprietary" - leaving aside CPU, do we have open FPGA already? Other examples?

[@KyleDunnIt]

We're close: github.com/icebreaker-fpga/icebreaker

[@bovi-li]

@@KyleDunnIt this is a development board with a proprietary Lattice and not an actual "open" FPGA.

[@KyleDunnIt]

@@bovi-li touche

[@jojje3000-1]

Why not OpenRisc?

[@kfishy]

Jojje 3000 from the RISC-V website, it seems their major objections are crowded encoding space, lack of 64-bit and more addressing, lack of compressed instruction set, and branch delay slots. Their reasoning is that fixing all those shortcomings would essentially have created a new, incompatible ISA anyway.

[@TheLordcasio]

Dang..this poor gal should've built an ISA where the audio engine could take care of audio feedback and do real time time expansion and compression...so those of us who are not in a state of panic, could understand the finer details.

[@vineeshhere]

Well, this is going to be a direct competition for ARM. Especially on the product where cpu is not much used or where cpu performance is not very important. As the RISC V standard does not force the companies to contribute back, The improvement on this open standard will not be as fas as of linux kernel.

[@aslanburdur2598]

new platform vivado with virtex 7 and advaned embedded system.