The MOnSter 6502 - how Eric Schlaepfer built a 6502 processor out of discrete transistors

Website: monster6502.com/ & visual 6502 www.visual6502.org/JSSim/index...
Eric's socials: / tubetimeus & mastodon.social/@tubetime
Other interviews: theamphour.com/609-open-circu... & unnamedre.com/episode/58
00:00 Intro
01:39 Visual 6502
02:15 Javascript list of transistors
03:16 Spreadsheet of each transistor
05:48 Compared to a gate level netlist for an ASIC
07:08 Altium Schematic
07:54 Different to modern layout
10:43 NMOS logic
12:40 Fanout
14:38 How buses work in the 6502
16:48 Transmission gates
19:55 Design gives us a snapshot of what chip design was like at the time
21:08 Rotate Right wasn't implemented
22:05 27C3 Reverse Engineering the MOS 6502
22:36 Manual verification of each transistor
23:22 Eric wrote his own LVS tool
25:19 Discrete 4004
25:27 MOnSter 6502 FAQ
25:45 Getting ready for PCB layout
26:32 Eric tried to prove it wasn't going to be possible
27:46 A challenge is that 6502 uses dynamic logic
28:14 Dynamic latches
28:43 Matt's flip flop video
30:52 Designed for a specific process
31:49 Custom process designed by MOS allowed depletion mode transistors
33:07 Big differences between PCB and Chip level
34:05 PCB layout
35:28 6502 layout all done by hand
37:58 Visual 6502 was very helpful for debugging
38:25 PCB validation
39:21 Powerup strategy
39:59 Scotch tape for finding hot transistors
40:35 Power expectations
41:50 First test was a NOP
43:38 Woz single step circuit
44:22 First program
45:12 Testing every transistor
47:25 80% coverage
48:29 Production status

[@GerbenWijnja]

Eric, if you're looking for a high resolution thermal camera, look for a Seek Thermal Reveal Pro. It has a thermal resolution of 320x240. Don't buy a FLIR, they are too expansive for what you're getting. Most FLIR camera's in the low price ranges have a thermal resolution of only 80x60, and cheat by adding contrast lines from an optical camera. Seek Thermal doesn't do that, they have actual thermal resolution at a fraction of the price you pay for a 'real' FLIR. As a C64 fan, I find your 6502 project very fascinating. Great work!

[@edgeeffect]

Let's not forget Eric's regular guest appearances on Curious Marc

[@henryD9363]

Oh yes! He is so amazing in his diagnosis and analysis of not quite working Apollo equipment , for example. The room always gets more than a little bit smarter when he shows up.

[@videolabguy]

I had the pleasure of working at the same company with Eric for a while. He is the smartest person I know. this project is simply mind boggling to a mere mortal such as myself.

[@georgegonzalez2476]

So surprising that it's only like 1/20th the speed of a real 6502. Long ago I worked on a CDC 160A, which was all discrete germanium PNP transistors and wire runs up to 5 feet long.. It was the size of a door and had a 12 microsecond clock. Slightly faster, and in 1961!
I'm also surprised you couldn't find some suitable active complementary pullups, that would have greatly helped the speed and lowered the power drain. For instance the BSS84AK,215 is only 18 cents each, is p-channel, and not too slow. It does have a whopping 18pf of gate capacitance, which is very low for a fet, but may be a problem if you need a lot of fanout.

[@peterschmidt-nielsen3577]

Wow, what a great conversation! Eric is a very clear speaker.

[@pentachronic]

This is very cool. This was the first microprocessor I learned to use and hand wrote and assembled my own code on. Literally I wrote the program and ops on paper and then translated them into hex/bytes by looking up in the tables in the Rodney Zaks 6502 book. Branch calculations were always a bit tricky. Then I poke’d them in to memory and ran them. On a commodore Pet 2001! Fun days when you were a kid! I have very fond memories of the 6502.

[@smudgerdave1141]

Me too. I recall you had to be careful about croosing page boundaries. My school computer was a PET 3032. I used to write on green lines printer paper my dad brought from work.

[@MrZnarffy]

Me too, I used to spend time at math classes to hand assemble code to run on the schools Apple II+'s on my lunch break.. I still know RTS is 60 hex, 40 years later.. LOL

[@pentachronic]

@@smudgerdave1141 Dot matrix fanfold printer paper (or teletype fanfold printer paper - basically the same stuff). Know it VERY well!!

[@smudgerdave1141]

@@pentachronic This was fanfold line printer paper around 18" wide. 😊

[@NotMarkKnopfler]

Ha! Yep - did the same but with the Z80. Wrote the op-codes into the back of my school maths book!

[@user-vq5rx5ym6b]

🖤6502🖤

[@brandonsamuelcruzsilva7626]

Excellent video Matt! I like that he connects technology very well, from the science at the device level to putting everything together to visualize a computer's operation, inspires me to learn more.

[@SatelliteGalaxy]

I'd like to see a discreet transistor version of Apples M2 processor with its 20 Billion transistors.

[@Wishbone1977]

As someone who is currently trying to write a 6502 emulator I can sympathize with the difficulty in coming up with sufficient test scenarios to have adequate coverage. That is one thing I have stolen a lot of, other people's test scenarios. Particularly for the decimal mode functionality of the ALU.

[@JohnnieMartynov]

WOW! This is great! Amazing work! 🤩👍

[@LongnoseRob]

Thanks for the great interview giving great deail about how this project was done.!😍

[@csolumaz]

Fantastic

[@ChrisJackson-js8rd]

great stuff!

[@eitantal726]

I'm interested in making a functional simulation of the SID chip, much like what was done on visual6502

[@ArneChristianRosenfeldt]

Then use LT spice ? SID is analog. IMHO that was a big mistake. With that much chip area and mono output ( only one DAC) I could have made real wavetable sound. Why even a 12bit DAC? PcEngine got away with 5 bits. Isn’t there noise in the SID at a level above the lsb? Could MOS even guarantee the correct order of analog values ( precision resistors )?
I suggest two or four pulses per scanline and modulate their width. Delta sigma for the fraction. Bonus points if we could use the 15 MHz crystal signal instead of the pixel clock for a bit more. And balanced DDR to use two phases.

[@markohara5146]

Want one.

[@noreagatube]

crazy

[@WaldoHazeleger]

Can the schematic be changed (and build) in simple logic gates/registers in stead of transistors ?

[@ZeroToASICcourse]

Yes I'm sure it could be.

[@WaldoHazeleger]

@@ZeroToASICcourse Do you have any example?

[@drdengineering819]

Question is, did you own a Qume terminal.

[@newtitojff]

Why not Kicad?

[@francoisleger287]

How slow can it run?

[@TheKetsa]

14:40

[@ZeroToASICcourse]

You can single step it, so as slow as you want

[@francoisleger287]

@@ZeroToASICcourse I was not thinking of the delay between clock cycle, but about the maximun delay between the two edges of a clock cycle.

[@ArneChristianRosenfeldt]

@@ZeroToASICcoursebut the IC cannot!?

[@GFScreech]

Want to make on

[@user-fq6qy8tk2z]

牛逼，

[@hernancoronel]

Can it run DOOM? LOL!