Q. 7.8: (a) How many 32K * 8 RAM chips are needed to provide a memory capacity of 256Kbytes? (b) How

แชร์
ฝัง
  • เผยแพร่เมื่อ 9 ต.ค. 2024
  • Q. 7.8: (a) How many 32K * 8 RAM chips are needed to provide a memory capacity of 256Kbytes?
    (b) How many lines of the address must be used to access 256 K bytes? How many of these lines are connected to the address inputs of all chips?
    (c) How many lines must be decoded for the chip select inputs? Specify the size of the decoder.
    Please Like, Share, and subscribe to my channel.
    For a paid solution, you can contact me on dhiman.kakati@gmail.com
    -----------------------------------------------------------------------------------------------------
    You can follow me on ----
    Facebook: / dhiman.kakati
    Twitter: / dhiman_kakati
    Instagram: www.instagram....
    Researchgate: www.researchga...
    Facebook Page: / lets-prepare-for-gate-...
    Problem solutions of the book Digital Design by Morris Mano and Michael Ciletti: • Q. 6.1: Include a 2‐in...
    Online Store:
    -----------------------------------------------------------------------------------------------------
    Wish you success,
    Dhiman Kakati
    (let's learn together)

ความคิดเห็น • 31

  • @HARSHKUMAR-ir4hb
    @HARSHKUMAR-ir4hb 4 ปีที่แล้ว +4

    Man ... life saver....

  • @s.muhammadmubashir2169
    @s.muhammadmubashir2169 3 ปีที่แล้ว +3

    Integrate 1 MB SRAM with 8086 microprocessors using Line decoder decoding technique. Whereas the available RAM memory chips are of 64KB. You are required to provide the completely labeled schematic diagram of each chip and starting and ending address of each chip. The starting address of first chip is 00000H.

  • @naveenwanigasundara2206
    @naveenwanigasundara2206 2 ปีที่แล้ว

    Nice explanation And useful sir,

  • @AnkitKumar-ps2jg
    @AnkitKumar-ps2jg 4 ปีที่แล้ว +2

    Truly life saver i got this wuestion in my exam

    • @DrDhimanKakati
      @DrDhimanKakati  4 ปีที่แล้ว

      Keep watching

    • @harshitsingh480
      @harshitsingh480 3 ปีที่แล้ว

      @@DrDhimanKakati sir there was one q asked in gate exam how many no of and gates required in 32k*16 decoder

    • @harshitsingh480
      @harshitsingh480 3 ปีที่แล้ว

      @@DrDhimanKakati please reply

  • @ReteshSharma57
    @ReteshSharma57 3 ปีที่แล้ว +3

    Draw the block diagram and label all input and output terminals in the ROM

  • @ronak._kumar
    @ronak._kumar 3 ปีที่แล้ว +2

    Thankyou so mch

  • @cseSurajMeher
    @cseSurajMeher ปีที่แล้ว

    An 8-bit shift register has the binary equivalent of the decimal number 86 stored in it. What are the base-10 equivalent contents of the register after the following operations have been performed? For each case, assume the same initial state given. [10]
    Shift Right 1
    Shift Left 1
    Shift Right 2
    Rotate Right 2
    Rotate Left 2
    Sir please solve this question tomorrow is my exam sir .i cannot do this question

    • @cseSurajMeher
      @cseSurajMeher ปีที่แล้ว

      I will see all the video of your. Your can solve in a easy manner so please solve my problem

  • @suvajitganguly8188
    @suvajitganguly8188 3 ปีที่แล้ว +1

    Your having any introductory class on memory topic and memory capacity?

  • @sarithashetty8581
    @sarithashetty8581 ปีที่แล้ว +1

    Assume that a processor has 24-bit address bus and 8-bit data bus. Design a computer system that interfaces this processor with RAM of size 512 KB made of 64 KB chips and 64 KB of single chip ROM with address map starting at locations 400000 and 000000 respectively. Draw a neat sketch of the schematic diagram showing the interconnections and the address decoder. how to desin?

  • @durgareddymiryala9030
    @durgareddymiryala9030 3 ปีที่แล้ว +1

    Nice explanation And useful bro.can you able to explain about transitors and memory bytes problems of binary codes problems.and overall ur explanations u done is nice bro

  • @piyushmishra860
    @piyushmishra860 2 ปีที่แล้ว +1

    Nice ♥️ video

  • @zararanwar9841
    @zararanwar9841 4 ปีที่แล้ว

    suppose an 8-bit data word stored in memory is 11000010. using the hamming algorithm, determine what check bits would be stored in memory with the data word. show how you got your answer.
    please make video on this question sir?

  • @shubhamkumar9862
    @shubhamkumar9862 2 ปีที่แล้ว +1

    Why we take 16 chips in 3rd question

  • @abamirene3936
    @abamirene3936 3 ปีที่แล้ว

    How many address bits would be needed if this memory were byte addressable

  • @asrafulsk1224
    @asrafulsk1224 4 ปีที่แล้ว

    suppose that a system uses 32 bit memory words and it's memory is built from 16.1 M× 8 RAM chips. how many address bits are required to uniquely identify each memory word?

  • @ericndoh739
    @ericndoh739 ปีที่แล้ว

    Please for the solution of 32k * 16. I am unable to know the number of adreeses it has

  • @DonGoliath
    @DonGoliath 3 ปีที่แล้ว

    Sleng Teng alert in my chan! I did another rebuild of this timeless classic. Give it a go!

  • @basmafaiz2629
    @basmafaiz2629 3 ปีที่แล้ว

    An application uses a 16- bits byte addressable virtual memory address space 1011110101111001
    An application uses a 16- bits byte addressable virtual memory address space 1011110101111001.
    a)calculate the maximum usable size of memory in KB? b)what is the range of a address?
    c) write down the offset if first six bits are used for page address?
    Answers please!!

  • @dreamhunter3513
    @dreamhunter3513 2 ปีที่แล้ว

    brother from which book i will find these type of mathematics????

    • @Blessed_Friday
      @Blessed_Friday ปีที่แล้ว

      from Digital Design by M. Morris 5th or 6th edition

  • @khushboo4156
    @khushboo4156 3 ปีที่แล้ว +1

    can you please solve this question..
    A computer has 4 GB RAM with each memory word of 64 bits. It has cache memory having 1024 blocks having a size of 128 bits (2 memory words). Show how the main memory address (C1AAF0AB)h will be mapped to cache address, if
    (i) Direct cache mapping is used
    (ii) Associative cache mapping is used
    (iii)Two way set associative cache mapping is used.
    You should show the size of tag, index, main memory block address and offset in your answer.

    • @DrDhimanKakati
      @DrDhimanKakati  3 ปีที่แล้ว

      You can contact me at dhiman.kakati@gmail.com

  • @anupverma4555
    @anupverma4555 2 ปีที่แล้ว +2

    Perpendicular

  • @فلاحكريمندىصعيب
    @فلاحكريمندىصعيب 2 ปีที่แล้ว

    Q : Design 64 kx8 memory using 32k x1 PRAM

  • @dharmindersingh2509
    @dharmindersingh2509 2 ปีที่แล้ว

    How many memory chips are needed to construct 2M*16 memory system using 512K*8
    static memory chips?

  • @anamzohra9169
    @anamzohra9169 3 ปีที่แล้ว

    HOW WE HAVE 16 CHIPS FOR 512K MEMORY

  • @Chaudharysahab-yt7pb
    @Chaudharysahab-yt7pb 8 หลายเดือนก่อน

    Sir girl friend ko samjha rahe ho kya 😂😂