This video is like last moment preparation. Thanx for helping me. Tomorrow is my Digital Logic Design paper in BTech. And i started from here. Thank you so much for Best guidance.❤️💖💫
Honestly thanks mam But there is a little mistake In SR flip flop block diagram just after the first pair of and gate you have to replace the second pair of and gate with nor gates. There is also another request Can you please add the output q along with the another q which has the upper slash Thank you ma'am for the awesome class
Good explanation but there is no need to learn the excitation table. It can be created using the characteristic table itself. Please don't try to memorize everything.
Thank you for this please making video of logic gates for cse students as soon as possible from starting to end. The way of teaching is very attractive. So please kindly make all videos of logic gates and mail me.
Bahut bahut dhanyawad didi ye Vedio banane ke liye aapka lecture aaisa laga rha hai jaise mere classmate apne notes se padha rhe hai
Thanks
Mam you are explained it like our friends and I'm understand all about it
This video is like last moment preparation. Thanx for helping me. Tomorrow is my Digital Logic Design paper in BTech. And i started from here. Thank you so much for Best guidance.❤️💖💫
All the best
@@CseGirl thank you ma'am 💖
Bro i need help
I hve Dp exam 17/01/2024 amd i m Watching it now and nice expansion ❤😊😊
I've exam tomorrow and I just felt like... my classmate explained it to me
Happy to hear that!
Same here 😅🥲, I've exam of DE tomorrow, BTW same Vibes✍
Appreciable efforts maam....
Every thing explained beautifully.
Love from DTU.
good explaining but there is a small error, in the excitation table X means there can be any value(either 1 or 0) not that it cant be possible
4:59 There is actually a way to solve this 😅
Mam there is a small mistake in it
It should be NAND gate not And gate you drawn AND gates everywhere
There is logic behind the truth tables if u draw timing diagram of those truth table you’ll find logic DON’T BYHEART
Very nice video miss understood everything clearly. Thank u so much. Will definitely share this video with my friends
Most welcome 😊
Adorable voice ❤
Nice work I understand ✍️✍️
Honestly thanks mam
But there is a little mistake
In SR flip flop block diagram just after the first pair of and gate you have to replace the second pair of and gate with nor gates.
There is also another request
Can you please add the output q along with the another q which has the upper slash
Thank you ma'am for the awesome class
Excellent lecture mam
Thanks
this lecture was so helpful
Your voice are so sweet ❤
In SR flip flop you use and gates , u have to use nand gates
?
Mam i have a question this is AND gate or NAND gate( For JK specially).
My exam is today
And i am watching it before 2 hr of exam
Thnxs It's was dam easy to learn 😊
In these online classes this is very usefull to me .... Love from Andhra Pradesh sister
Glad to hear that
Eda bromede
Very clear explanation ...
Glad you liked it
When set(S) pin is 1, output Q will be one. When reset pin is 1, output Q is 0. Because it's rest. Simple logic, don't need to by heart it.
Really appreciated 🎉 ❤️
Thanks
Try to explain sis...we can't memorize everything 🤕
I have exam tomorrow it helped me alot madam thank u for your valuable explanation 🙏
All the best
I ❤ it! Thank you
mam is thst nand or and gate plz mention clearly .... clarify our doubt quick plz
1:17 D in D-flip flop stands for Data
Very nice Video
Thanks
Welcome. Can You Pls Help In Other Subject
Ur Background voice give feel of class room 😅😅😅
This video so helpful for mam thank you so much mam ❤
Thanks for liking
Everywhere i see the nand gate,and its and gate here ,which is right?
thank you for your efforts mam
tommorow is my digital electronics paper
Great 👍
clk ni enable pin gha mention chesaru all are nand gates kada ravali only and gates ni use chesaru
Thank you mam 😊
Most welcome
Mam theory M lekunta duagram inka aaa tables veste marks vasthaya😢
Awsome
awesome explanation ❤️
Thank you @Mukta 🙂👍
You are teach like my friend.So thanks for your helpful video ❤️
You are so welcome!
mam where is nand gate in SR flip flop ???🤔🤔🤔
आप तो gjb का पढ़ती है
Gjb madam
Love you mam 🧿❣️
Thank u so much for outstanding explanation😊
Most welcome 😊
TQ aunty
Mam can I get notes..😊
Tx mam
Diagram is a nand gate mam
U will doing nand gate no
Very useful thank you so much
Glad it was helpful!
Mam in circuit diagram, which logic gate u have use AND ya NAND
NAND use hona chahiye tha lekin AND use kara h inne
Apka education qualification kya he
Actually in SR flip flop nand gate is used but u have drawn and gate...
Right doubt
2maro is my exam and now I'm watching it 😂🥲
I think u draw a wrong ckt...because bubble is not there for .."and" gate
Thanku mam
Good job
Mm.. thanks 👍❤
You're welcome 😊
Difference between flip flop and lash
hii akka reply ?
Thank you aunty 😊
Super mam...I like u r classes
#new subscribe❤
Veyn nice 👍👏😊
U didn't use the nand gates u used and gates .plz check that
We can't memorize...soo..try to explain sis..
In s-r flip flop to use nand gate symbol
Not a and gate
Tq😍
Welcome
anyone knowns latch and flipflop is same??
Well done
Thanks mam from nit Rourkela 😂 no study in online classes 😂
Good explanation but there is no need to learn the excitation table. It can be created using the characteristic table itself. Please don't try to memorize everything.
mam it would be great if you explain the logic for all flipflops
hello, sis is that ur notes ??
Thank you for this please making video of logic gates for cse students as soon as possible from starting to end.
The way of teaching is very attractive.
So please kindly make all videos of logic gates and mail me.
E is clock pulse
❤
I couldn't get....not much clarity
Timing diagrams
the sr flip flop operation table is wrong
Hindi me bhi bnaaye
👍 good
Thanks
very detailed.. thankyou
नमस्कार मेम 🙏
sr flip flop circuit is wrong
It is only craming.......
When there is no logic of truth table
Then why made??
SR flip flop truth table is wrong
Today is my exam
What you teach . teach that topic step by step
Nice.
I like it
In SR flip flop it is not nand gate
Exactly!We use NAND gate not AND gate
@@Shivam-wp3gr we can use both if we are using nand gate then output will also be in nand gate
and if and gate is used then output is of NOR gate
@@akshaymaloo8182 yaa! Actually I don't know about it, am having only with NAND and NOR Gate in the syllabus for this topic. So it's a mistak, sry😅
Can you send us pdf
If u just like explain how u understand then who did watch ur channel
explain the things .... and write clear ....
U r gates symbols are wrong and try to explain memorizing is nothing but byhartingq I think u understand it
Mam Hindi me smjhaana chahiye.. 🥲🥲
Appreciated... good job👍
Thanku so much sis ..well try😊
Welcome 😊