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Thanks for the refresher. It is interesting to note that the final circuit was essentially a mux. Which if you are using a mux for clocking, latch en, or set/clr that you have a potentially for glitches on that line.
you re the G.O.A.T
Absolutely no doubt in that
Thanks for the refresher. It is interesting to note that the final circuit was essentially a mux. Which if you are using a mux for clocking, latch en, or set/clr that you have a potentially for glitches on that line.
you re the G.O.A.T
Absolutely no doubt in that