Implementing 8X1 MUX using 4X1 MUX (Special Case)

Digital Electronics: Implementing 8X1 MUX using 4X1 MUX (Special Case)
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Same case!!!! :)

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[@KurtRonaldEsteban]

There are also MUX with Enable which are tri-state. Whenever the enable is not active, the output of MUX is in HIGH IMPEDANCE (HIGH Z) STATE. This technology can eliminate the need for OR gate in the final stage.

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This very simple thing was a nightmare for me.

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[@KushRanjeet]

Thanks alot to clear my doubt about MUX tree
Best explained topic on internet still I have searched

[@weescy]

Great video, solid speech.
I've made 16x1 MUX using 8x1 with help of this video. Thanks

[@nikithashekhar1522]

Tomorrow i have exams....this is life saviour...

[@yellatrandom1600]

Thank you. it helps me a lot in doing my laboratory using Logism. You clearly discussed everything we need to know using 4:1 in 8:1 mux.

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thank you so much sir... the concept of mux tree is now very much clear to me...

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Very well explained. Helped a lot. Thank you.

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[@saipraveenchinthaginjala7712]

I think we can use 3 4X1 MUXs ;
1st MUX has inputs i0 - i3 ; select lines = s1 , s0;
2nd MUX has inputs i4 - i7 ;select lines = s1 , s0;
3rd MUX with 1st two inputs = output of 1st MUX; next two inputs = output of 2nd MUX ; select lines = s2 , s2;
Nice lectures sir. Thank you.

[@starkendeavours7072]

if we don't want to use 2 4x1 MUX, then we have to connect the output of MUX 1 with i/p line I-0 of 3rd and o/p of MUX-2 with i/p line I-1, the rest i/p line can either be grounded or can remain floating. and only one selecting line will be operational

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Clear and nice explanation!

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Video is clear and focused

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Best playlist..... 💯

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Very good explanation.Thank you Sir

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simply extrodinary

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Really helpful thank you sir 😃

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Thankyou Very much Sir

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Great tutorial!

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Thank u so much it is very easy to understand.

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really
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Thank you for this

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sir u r great ..good job..thanks for amazing videos..

[@sammymishal5629]

it's very clear that you can implement it using 3(4x1) Multiplexers
or you can using(2 "4x1", 1" 2x1" )

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Thank you

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verall best lec. . now i understand mux. lot of thanks ........rating 10/10

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The way he says "varying"

[@ramakrishnang.v9846]

the video was very nice and useful for me to learn easily. hope u publish good videos like this

[@PoonamKumari_23]

Sir I have a question,if we are consider S2 as 0 then the first block will be enabled but how is S2 is 0? Even if we put an not gate there.

[@santoshmode9222]

Same doubt brooo!!

[@amanullah1707]

That was very clever

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Thanks alot sir
Very useful 😍

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Well done

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Good job Thanks a Ton!

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[@mohammadtousif7295]

Implementation of 8×1 MUX. Using 4×1 and 2×1

[@nareshvepamani7805]

Thank you bro

[@gulkayma]

Your videos are very descriptive and useful. Thanks a lot but why not have subtitles this video? You must add subtitles to each of them.

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thank you very much sir,,great job...:-)

[@abubakarshaban6118]

thanks a million it really helps

[@harjeetsangwan7707]

you can use s2 , s1 and s0 as 3 digit binary no. , it will be very easy

[@otsilekgaladua5485]

thank you sir

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Best video

[@biboswanroy6699]

I think enable is active low.If that is so then not gate shall be connected to enable line of lower mux

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[@mustafaalhariri572]

You can't use s2 as an enable because in that way you are having 5 inputs, 'the enable in the MUX is usually connected with the output'
instead you can connect s2 prime to the first MUX output with an AND gate before the OR gate
and connect s2 to the second MUX output with an AND gate before the OR gate
Thanks

[@RajeshKumar-ot4er]

Thank u

[@pakalapoojitha1548]

Which are other cases where we find this type special cases?
Can we use the same method as using enable for any special case?

[@j-Ck.Sp-rro_1827]

we can also implement 2:1 MUX in place of OR gate

[@manasagowda76]

Sir also explain, how to implement 8×1 MUX using both 2×1 MUX and 4×1 MUX . It will be useful for learners. And i love this channel 🤍.

[@manasagowda76]

I mean , implementation of 8×1 using four 2×1 and one 4×1 also implementation of 8×1 using two 4×1 and one 2×1 .

[@jamesroy9027]

thanks

[@ltd5480]

cool, Genius thinking

[@King-qi3ts]

thank you so much

[@rachidaissa9101]

very useful lesson and very understanding explication well done for this Profeseur but how we can do if we wont to get i0 ????

[@Paul_Lanka]

Enable Signal can be Considered as 3rd Select line?

[@AkshatVivekJain]

sir in this problem you have taken msb of truth table on left for select lines it must be on rihgt side

[@unknownofficial_2410]

We can't use 2 4×1 mux and 1 2×1 mux ? Please explain sir ??

[@unknownofficial_2410]

And s2 gives to that 2×1 mux

[@rutu.dances.to.express]

your videos are very useful!! ThankYou so much..! i had one doubts i.e how to design 16:1 Mux using 4:1 MUX??

[@vinodwadhwani9330]

16/4 = 4 +4/4 = 5 (4:1 mux will be required)

[@Hariom_143-]

5, 4:1 mux 4 connected to 1

[@rafayimran5732]

what if both muxes are working and then we use 2 and gates which determines which output will be chosen ?

[@hozaifmalik6202]

implement 32s to 1 multiplexer by using 8 to 1 Multiplexer and also its VHDL program

[@divyanshsharma813]

can u please tell me , where this special case is used , i mean what's the application?

[@dreaming_vin]

The enabled line, that is, the third selection line, is it going to be anded with AND gates inside the 4X1 MUX?

[@mateusoliveira413]

obrigado pelo vídeo!!!

[@ajokeoguns7053]

thanks for the tutorial prove useful.., please how can i implement 16:1 Mux using 8:1 Mux??

[@tranhavantran7263]

Thanks

[@tranhavantran7263]

Bạn có thể làm thêm phụ đề tiếng anh được không

[@rahulkece8993]

what are the other special cases which can be asked ??

[@theodorejonathan6460]

when S2=0 a the first input,inverted s2=1,s1=0, So=1, the input is I6 not Io.

[@mirmuneerhussainiamachange2862]

Awesome !!!!!!!!!!!!

[@advaitmahesh8363]

Here u have said that IC will work if enable is high or 1. But IC works only when enable is low or grounded.Please reply!

[@rachitmittal448]

i think whenever we are implementing a 2^n:1 MUX using 2^n-1:1 MUX, It would be implemented in this manner. This would apply only for n>2.

[@kamalbalaga]

Bro tell me what you did at starting?
I cant understand about 8/4 =2 ,2/4=0.5 ,and in total u said it is 2.5 mux....
So that part little bit confusing.
So let me know that.
Thank you

[@garnikpepelyan8760]

Yeah it is confusing. I think that number "2" is the output lines of the first and the second multiplexers which will be input lines for the "third mux" which also has 4 inputs so we are going to use only two of four inputs of the third mux...