PCB layout guidelines to optimize power supply performance

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  • เผยแพร่เมื่อ 26 ก.ย. 2024

ความคิดเห็น • 4

  • @whiterabbitangel
    @whiterabbitangel 3 ปีที่แล้ว +1

    i would say putting the void under the switch node will likely to create more EMI issues because i consider the switch node as a high speed digital signal. Any thoughts?

    • @rolandoaguilera3114
      @rolandoaguilera3114 2 ปีที่แล้ว

      Assuming a 2-layer board, hence if the area is void, there would be no or minimum coupling because a capacitor is formed by 2 conductors and an internal dielectric. Having a void means you don't have the needed plane/conductor to create a parasitic capacitor

  • @brianernzen2509
    @brianernzen2509 11 หลายเดือนก่อน

    Where’s the ground plane? Every trace should be one dielectric distance from an uninterrupted return reference. I don’t understand converter data sheets that show ground pours on the top when layer 2 should be a solid ground plane.

    • @xxxkueckxxx
      @xxxkueckxxx 10 หลายเดือนก่อน

      This isn’t a UHF transmitter.