Sir, please review this is my practical project question,i have to submit in 2 days.I have solved the sum ,got the components, but what next . Please sir ,your little help would be matter much.this is the ques. Design Single stage CS amplifier for FL upto 20Hz. Use JFET BFW11 to give output voltage of 2v & voltage gain lAvl =10. Design to give ID = IDs = ½ IDSS.
For Cs configuration we need two JFET. Because the circuit need to satisfy voltage sampling. we know Vf = (Rf/Rf+Rs)xVo. If Vo = 0, then Vf=0. It is voltage sampling. Not possible with single stage. Whereas we can construct single stage voltage series feedback topology but we need CD config.
Sir, please review this is my practical project question,i have to submit in 2 days.I have solved the sum ,got the components, but what next . Please sir ,your little help would be matter much.this is the ques.
Design Single stage CS amplifier for FL upto 20Hz. Use JFET BFW11 to give output voltage of 2v & voltage gain lAvl =10. Design to give ID = IDs = ½ IDSS.
Sir, why we have used two jfet's here
For Cs configuration we need two JFET. Because the circuit need to satisfy voltage sampling. we know Vf = (Rf/Rf+Rs)xVo. If Vo = 0, then Vf=0. It is voltage sampling. Not possible with single stage. Whereas we can construct single stage voltage series feedback topology but we need CD config.
I got it.
Thank you Sir