What is also interesting is that more and more SW makes it possible. I'd wager that in the last 8 years SW and modelling has contributed more advancement than materials science.
@@hiddendrifts Yes software, they use GPU farms to calculate the optical aberrations that are needed to make the photo mask produce the actual desired pattern on the silicon. They also use evermore complex software to run the thermal and electrical timing behavioural simulations on their logic designs to know whether their chosen layout will actually work. Black magic I say 🙂
"Idk guys this video is pretty niche and probably won't do well -" Goes on to unroll the most fascinating semiconductor historical deep-dive with ample visual aid and citations. I love this channel so much.
The drama of the semiconductor industry is long, wide and varied; not just the interconnection of transistors but the players themselves. Always a good time to get a glimpse into that world.
how many players are there these days? I know China (PRC) has some government grown fabs and companes, but the major ones are TSMC, Intel, Samsung, Qualcomm (NVIDIA and AMD I heard is just contractors/ designers, not main players, just like with Apple)
@@dine9093 You never make any money on niche products. Pronounced it, we understand him, are you non native ? China India levels of English you need ? US failed too !
FYI - when chip frequencies approach microwave (about one GHz) , the regular resistance and capacitor functions become really weird. For many years of my career, designing circuit boards was fairly easy. Then system frequencies approached one GHz and beyond and we had to use microwave design rules where a wire was no longer a wire but much more complex with properties like an antenna. The chip designers have also hit those restrictions which is one of the reasons very few commercial chips function beyond two GHz and all cpu/gpu makers went to multi-cpu/gpu designs.
for by far most wires on a chip, the RC line model can be "good enough", even at very high frequencies. The medium -long haul interconnects are where it gets more tricky, but there's design rules and simulation tools that mean it's possible to make them work. Frequency scaling isn't limited by the interconnect, it's limited by power, primarily
"niche" almost every human on earth uses this technology that is the closest thing humans have ever done to literal magic. The work you're doing with this channel is priceless for society.
@@Hyperious_in_the_airThis is how you get burned at the stake for being a witch. We stiill have a ways to go with these simpleton imbeciles, just look at the last pandemic.
Thanks Jon, as usual a brilliantly researched topic. As another commenter stated "Niche is good". In the years to come, you will be regarded as the definative semiconductor historian.
He's become a resource for me to stay updated on the industry even after I decided on changing my line of work. When I was an undergrad, I started off wanting to eventually go into chip manufacturing, but halfway through, I shifted towards energy conversion and storage. I rely on this channel as one of the ways I still stay informed about the semiconductor industry.
Birds on a line don't add DC resistance but do add capacitance, thus adding to the AC impedance to a point that you can measure it if you wanted, with signal reflections even WHERE on the line they sit.
Pre high speed internet, I wired the telephone lines in my house in a star pattern. Had to change that as speeds increased due to the capacitance of the other lines. Now it’s just one line straight to the modem.
@@tonydoggett7627 dude, time to switch to twisted pairs for your phone lines! 😁 Seriously though, I've seen people use CAT-5E cable for their ADSL POTS line.
I don't think the general audience has reach THAT level of electrical engineering. AC & DC are very different animals. Still, NeXT is a real phenomenal in DC data buses and long parallel (untwisted) transmission lines.
@@erictayetbetter hope it's the cat 5e that's gel filled and rated for exterior exposure, preferably with a bonded aerial cable to take the strain weight of the wire 🤣
Dude, how do you produce so many incredibly good videos on such a consistent basis? I can't thank you enough for teaching me so much about the industry I work in, plus various other topics. You're one of the best resources for this kind of thing.
You are missing critical information as to how TSMC "cracked" the low k dielectric issue at the 130nm node...specifically they didn't. What happened was that at the 130 nm node they went into a "partnership" with LSI Logic in exchange for fab capacity and a Low-k copper back end. In reality TSMC's low-k backend was as you've mention fluorinated oxide, which was "lower-k". As part of the agreement LSI and TSMC "shared" their 130nm processes, LSI had a low-k/Cu backend that had been put together inside a year after the sales/marketing group changed their tack on what was required for the interconnect - initially they agreed a low-k/Al process was OK (which it was from strictly a data driven standpoint, but by mid process development Cu/Low-k were the buzzwords and they changed their requirements, hence the hasty development of the low-k/Cu backend). This low-k/Cu backend used low-k from the 180nm process using Electrotech/Trikon Flowfill dielectric, that I believe was MSQ based. After we saw the FSG/Cu backend process that TSMC were using for their 130nm process, we had to transfer the Low-k/Cu process from our development to TSMC to be able to produce our 130nm material, so TSMC effectively were given all the information to run a true low-k/Cu back end process, effectively for free. It was universally agreed by the engineering staff who were required to do the transfer as a BAD IDEA, and was the beginning of the end for LSI Logic wrt to developing and manufacturing leading edge technology, but the corporate leadership thought is was a good idea as it saved on manufacturing investment, but at the expense of giving away the process crown jewels at that point in time.
@thecraggrat Yes you are 100% correct - I was the provider of the Trikon Low-K "Flowfill" process which we put into production at LSI (not high volume) at 0.18 micron with aluminum. As LSI determined, it was the C in the RC constant that was where all the improvement could be most realized for the devices, and thats why they chose us and we partnered to deliver it. But yes there was some less than straight talk, and a decision to finally partner with TSMC against the engineering team's recommendations, et voila' TSMC gets a free industry breakthrough from LSI. Whats more, the Black Diamond of AMAT where I went to work was a copy of the Trikon Flowfill Low-K process - same SiOC process except the silicon carbide barrier they call Blok. So it was not a TSMC breakthough but an LSI hand off. And once TSMC had it from LSI, LSI found their competitive edge lost as the entire industry had it now and they went fabless then sold the company.
As a Masters in Electrical Engineering student, these videos are providing me with very insightful additional resources for my courses. I thank you a lot for your hard work.
This was a great history of these technologies. As an engineer who has firs to hand experience with these lines and steps, I appreciate the background, and I see the same ongoing work and challenges with current industry shifts.
The problems and challenges are what thrust innovation through a select few that are willing and able to try something new. I'm waiting for torus shaped chips, maybe sphere in design. Might want to start linking physics with material sciences now that robots are becoming more accurate during the design process.
Small correction at 17:40 . This is an edge bead removal chamber used to etch away copper seed on the edge post electroplating. You can see a small grey arm used to dispense etchant on the edge of the plated wafer. Great video, love your content!
Two things delayed 300mm production. Photo lithography improvement (smaller lines). And copper’s pressure curve. Copper would deposit on vacuum pump lobes and make the pump useless within a week.
The designers define the product R x C as the "time constant" of an integrator. So the RC number is not "niche" as many said, but it is absolutely at the front of semiconductor technology in setting the maximum clock frequency of an IC. Thank you for the incredibly well researched video. Greetings, Anthony
@@FTW23-qq8nb Actually, over the years, CPU and logic technologies have advanced in the direction of ever lower logic voltages. From nominal 5V in the 1970's, through 3.3V, 2.5, 1.8, 1.2, 0.8V. As new technology made each lower voltage feasible, it was adopted because lower voltage logic transitions (0 --> 1 or 1 --> 0) require less charging of the unwanted but ever-present "parasitic" capacitance. Also lower voltage allows smaller and closer features, facilitating higher density chips. During any particular era, higher speed at a particular voltage has required higher _current_, to more rapidly charge the parasitic capacitance. So you will find that logic families that are contemporary with each other may have variants for low-power and low speed, or high power (higher current drivers) for higher speed.
A capacitor resists changes in voltage. Since current is bounded by resistance, there is a maximum voltage that can be achieved for a particular clock frequency. Lower the clock frequency, and you can increase the voltage and vice versa.
@@FTW23-qq8nb The time constant is the same but there is less time due to the higher clock speed to reach the logic threshold. With a higher voltage on the logic power supply the rise time to the fixed logic threshold is faster allowing the logic to operate properly when overclocked.
This video was one of the most satisfying videos I've seen in a while! It was sooo cool to learn soo much in just 40 mins! This, for me, was one of those videos that really made all the puzzle pieces I've been gathering over the years just fall into place together... Thanks! Your presentation of all this historic and scientific data was immaculate!
Thanks for this fascinating and well written video! Your narration / delivery is excellent - clear, well paced, informative, and yet just informal and human enough to warm the whole thing up and make it relaxing and fun. I think this is my favorite of your videos. A great topic, given an excellent treatment.
Another GREAT video. It reminded me of my first term in digital electronics decades ago. I remember this innovation! IBM inventing copper on silicon, as it was called, back then. What I didn't realise was the rest of the industry catching up within the year. And yes the low-K dielectric problem took more time to crack. By that time, I have already moved to the software side of things. I remember my Polytechnic offering Micro-tronics (wafer fab) for the Mechanical engineering students.
I made copper dummy wafers for the new copper chip makers. The copper plating bath was unique. It deposited high purity copper preferentially in the bottom of trenches. By inhibiting deposition at the top of the trenches. This enabled filling deep high aspect ration trenches to be filled. Subsequent chemical mechanical polishing resulted in deep clean vias and a flat surface for subsequent deposition. Truly a game changer. And an exquisite example of the platers art.
TSMC enjoyed technology transfer for copper BEOL. It was only later that they started leading, after reaching parity with IEDMs. I know, I had to transfer and teach them. Novellus and IBM worked on the node and invented the capital equipment. Other American vendors worked with iedms on the stack. It was wall street and finance capital that pushed asset light strategy.
Today I was having a bad pain day. I have Osteogenesis Imperfecta or Brittle Bones and have fractured over 150 times in my life. So I just smoked some thankfully legal weed and got on TH-cam and was blessed with a 30+ min Asianometry! Your videos genuinely help me relax and feel better and I just wanted to say thank you for all the work you put into these videos. They are second to none. ❤
You son of a... I have never been this thrilled and fascinated by a story about microchips. That was truly fantastic! I have seen all your videos and this was by far the most exciting one. Remarkable work!
I ramped up Intel fab 22, their first full production copper fab. I worked in defect metrology. This sure brings back memories. I've spent literally thousands of hours looking at copper metal lines under a microscope.
gaboron RISC V developing stopped 10 years ago, why you still use that ? What processes you still run on RICS in 2023, or are you a Junk rat in Computers ? StrongRisc ?
Lol the concept is new to me. Everything i know about semi conductors is from this channel started watching when their was a drought on that island and the chip shortage. I bought Nvidia stock in 2021 because of this channel and i thought i discovered a little known technology that would disrupt the status quo. thanks for sharing the knowledge @@lucasrem
@@gaboronem8615 don't listen to that pedant and barely intelligible bozo spamming all over the comment section. Jon covers historical topics, the RV disruption is just happening and there is not much to say outside the wikipedia page and media coverage.
I always find it odd how American English speakers say "niche"; anywhere that speaks British English (UK, Australia, etc.) pronounce it "neesh" in-line with its French origin. Thanks for the wonderful video John.
@@mephInc I've been American my whole life and this is the first time I've ever heard that word pronounced with a hard consonant at the end. I've never lived or worked in the Pacific Northwest, Northeast, or Midwest, so maybe its said that way in one of those regional dialects.
This gave me a deeper appreciation for the hard-won R&D miracles that go into the struggle for cheaper faster microprocessors. It's amazing to think of how far TSMC has come in a couple of decades. I for one would love to know more about the even more miraculous struggle to get us to 2nm.
I remember the introduction of copper interconnect. At the company where I worked, there was concern about the reactivity of Cu with Si02 and the difficulties posed by the barrier metals at that time - titanium and I think palladium and tungsten, which were all causing problems because they were such hard metals. But that speed pickup from Cu was irresistible. That's also when companies and foundries started to get very interested in better insulators/IMDs like 'Coral.' Interesting that tantalum became the barrier metal of choice.
Very impressive research and excellent video presentation. I lived through the 250, 180, and 130 nm process nodes as a fab customer. Thank you for helping me relive this history.
Excellent program. Very interesting chronology. Learnt that Copper xan't be etched. Didn't know that. Also had not realized that the metal separation layer was a Tantalum compound. I can see now why it too IBM 15 years to develop it. Thank you for your amazing work.
Hey Jon, great video. Long time sub to your channel. You deserve much more subs. That being said, what are your thoughts on Canon's nanoimprint systems that is suppose to compete with ASML's lithography machines? Would love a video and thoughts on advantages and disadvantages. Keep up the good work!
IBM's trouble with their lowK process impacted my employer at the time. They ended up moving to TSMC. Also, another unexpected impact of finer pitch interconnects - especially the mid-level long runs - inductance! We ran into cross talk problems causing glitches that would cause latches to pop open when they shouldn't. 🤦
Very good video - AMD using CVD to apply butter is a classic comment. Passing along a couple of historical comments: IBM always had a Ferrari type process in the wings that they didn't run or scale up. In 1979, the M1 & M2 pitches for NMOS 1 were 5.0 and 7.4um. The process used Polyimide dielectric (2.8 dielectric constant). Patterning the vias had topography issues that were related to reliability problems, but the biggest issue was that IBM never decided to ramp production - it was easier to use the internal technology as a bargaining chip.
Of course, birds aren't real - the drones decrease the resistance of the power line, selectively helping renewable power sources (wind, solar, hot air from right wing talk show hosts).
Thanks for the video. I was with AMD that time, and we had a good cooperation with Motorola for the copper process. I remember having at the begin a real grazy separation in FEOL and BEOL, production areas ,later it came clear it didn’t need to be that harsh.
I gotta wonder how long it takes to make one of these vids. Must take days to film and edit, but weeks extra for the initial research efforts. Amazing.
This is by far the most insightful video I’ve ever seen about the history of Cu/LK being introduced to the industry. I was lucky in almost all those scenes even they were so painful but finally we went through, and all the way to 50x smaller geometry now.
If it is legit, it predates the Wikipedia listed first use of it by almost a decade. I'm pretty sure it's just an easter egg for the pedantic. source: en.wikipedia.org/wiki/TL;DR Either way, it is amazing. for different reasons, but contemplating it only makes it better. just amazing.
I remember i was in high school around this time, and cpu speed drastically increased over the course of several years. Went from 300, 400mhz to 500, 600, 900 and up, so quickly! I wonder if a good amount of it was due to this process.
Hmm Copper Tungsten is a neat alloy. Works very well as submounts where low thermal expansion and good thermal conductivity are needed. Mounted a lot of AlGaAs laser chips on the with AuSn solder. ❤
It's crazy how many developments and innovations there are in semiconductors that practically no one knows about and we all take for granted every day.
Nice video, but I feel a little disappointed that you never explained more about the low-k PECVD method at the end. Though you got pretty close by mentioning brand names like Black Diamond and references to the PECVD manufacturer like Novellus. I looked into these low-k PECVD layers: it seems to be "carbon doping" an SiO2 layer (while it's being deposited) to obtain SiOCH. There's various precursors that can be used, and making the layers more porous also helps.
I seem to remember that one of the processes on the dielectric was that it had to be mechanically stressed in one direction - but I can't remember the exact details.
Oh and I wanted to ask if you have researched anything about the experiments with fabs in space. There are lots of interesting things with growing the crystals in space but I haven't really seen how any of the benefits could be applied. I mean it seems like gravitation when laying down layers is a big problem. If all layers could be deposited in microgravity, then deposition would be completely regular with maybe only quantum irregularities in the materials.
Your historical report on this copper breakthrough seems like a headline article from an "Investigative Journalist's" 3 year study. I know nothing of these molecular fabrication processes, nor the enormous financial risks big companies take in edging out their competitors (so we can watch yachts racing across our computer monitors). After watching your episode, I feel much better informed about the tiny electronic world I hold in my hands every day. Thank You!
I am a former Nikon Photolithography tech from IBM Burlington(technically in Essex Jct), now owned by Global Fundries. You are spot on with your A&P of the terms. Good job.
I remember working for Intel in the fab. We separated copper processing from conventional. The people working in copper wore orange gowning. If we brought a hand tool in from the conventional area to copper area, it had to stay there.
Great video. Also, without CMP none of the copper work would have rounded the corner. No one remembers the floor polishers that righted the Kawloon Walled City. The ASML hardware for litho was also paramount all the way to today, especially for the latest size battle between the giants.
It would seem a pretty obvious way to get copper down on a chip would be to use electroless copper deposition. We were using it all the time in the late 70’s in pca manufacturing. You also mentioned that there is no way of etching out copper -ferric chloride! ( although I am sure that there are reasons why it is not applicable-I am not into chip making-I do love these videos-terrific work-keep them coming 😊
Seconded. I thought something similar. Also, the copper in my water pipes doesn't easily dissolve in water to cause a toxicity problem. I suspect he is probably referring to soluble Cu+2 salts in the waste stream. I'm not in chip making either (a Chemist) but learn a lot from these videos.
This was amazing your insight into the industry is incredible. I didn't realise Cooper was so hard at those scales considering the industry built every PCB on this stuff using photo resist. Electro plating seemed to be an obvious choose for the copper layer though at least from a predictable repeatable manufacturing process. The high K chemical make up was vary interesting I actually thought Intel was first to market with high K but I guess there has always been different implementation some better than others. It's also interesting how IBM seemed to be behind or only slightly ahead, I thought they were cutting edge. It really sounds like the research at TSMC is top not and it is not just there access to EUV.
@@0neIntangible Yes. But my father worked in pharmaceutical marketing. And I work in Biotech. Related field, yet I got no clue on marketing of any sort. So, in the end its mainly Mr. Jon's brilliance.
I worked at National Semiconductor in the late 90s as an analog ckt designer (and not very good one at that), but I had no idea of all the drama going on in the fabs! I was working with VIP3 and CS65 for analog and mixed signal stuff.
"Semiconductor manufacturing is literally black magic. All of this just barely works, man." My favorite quote of this episode.
What is also interesting is that more and more SW makes it possible. I'd wager that in the last 8 years SW and modelling has contributed more advancement than materials science.
Quantum mechanics is spooky action at a distance. Happy Halloween🎃
We began developing copper interconnect twenty plus years ago.
@@etmax1 "sw"?
@@hiddendrifts Yes software, they use GPU farms to calculate the optical aberrations that are needed to make the photo mask produce the actual desired pattern on the silicon. They also use evermore complex software to run the thermal and electrical timing behavioural simulations on their logic designs to know whether their chosen layout will actually work. Black magic I say 🙂
"Idk guys this video is pretty niche and probably won't do well -"
Goes on to unroll the most fascinating semiconductor historical deep-dive with ample visual aid and citations.
I love this channel so much.
The drama of the semiconductor industry is long, wide and varied; not just the interconnection of transistors but the players themselves. Always a good time to get a glimpse into that world.
how many players are there these days? I know China (PRC) has some government grown fabs and companes, but the major ones are TSMC, Intel, Samsung, Qualcomm (NVIDIA and AMD I heard is just contractors/ designers, not main players, just like with Apple)
IBM still makes stuffs
@@makisekurisu4674 They do but like this copper interconnect story they rarely go past the research domain to make industrial manufacturing.
It's messier than the housewive of New jersey.
LOLS REALLY!!??? 😀😂 HOW ELSE SO!?? DOES SOUND INTERESTING! 😄
Niche is best. General overviews are a dime a dozen. I want the deep lore. The kind professors try to hide from us behind 3 inch thick hardcovers.
> Niche is best.
It's even better when pronounced the right way!! :D
you're thinking too large
@@lucasrem
My exact thoughts
Lore so deep that you commented 2 months ago on a video less than an hour old!
@@dine9093 You never make any money on niche products.
Pronounced it, we understand him, are you non native ? China India levels of English you need ? US failed too !
FYI - when chip frequencies approach microwave (about one GHz) , the regular resistance and capacitor functions become really weird. For many years of my career, designing circuit boards was fairly easy. Then system frequencies approached one GHz and beyond and we had to use microwave design rules where a wire was no longer a wire but much more complex with properties like an antenna. The chip designers have also hit those restrictions which is one of the reasons very few commercial chips function beyond two GHz and all cpu/gpu makers went to multi-cpu/gpu designs.
for by far most wires on a chip, the RC line model can be "good enough", even at very high frequencies. The medium -long haul interconnects are where it gets more tricky, but there's design rules and simulation tools that mean it's possible to make them work.
Frequency scaling isn't limited by the interconnect, it's limited by power, primarily
at 10ghz the wavelength is about the same as the die edge length for cpu chips, 30mm.
@@Archonsxlol
@@tommihommi1interesting, I think. I almost have a simplified, basic, cursory grasp/understanding of what you're talking about. . . 🤔 almost
So, none of the 8 cores of my 3700x actually clock at 4.3 ghz? They all run below 1 ghz and the speed is added up to 4.3? Weird.
"niche" almost every human on earth uses this technology that is the closest thing humans have ever done to literal magic. The work you're doing with this channel is priceless for society.
imagine explaining to a person from 1265 that "yeah, we put lightning inside a rock and it displays moving images of cats for us now"
@@Hyperious_in_the_airThis is how you get burned at the stake for being a witch.
We stiill have a ways to go with these simpleton imbeciles, just look at the last pandemic.
@@Hyperious_in_the_air:😆😆😂😂😂🤣🤣😂😂😂😆😂😂 YES, THOSE CATS DANCE FOR OUR PLEASURE! 😈✊ 😄😄
Thanks Jon, as usual a brilliantly researched topic. As another commenter stated "Niche is good". In the years to come, you will be regarded as the definative semiconductor historian.
He's become a resource for me to stay updated on the industry even after I decided on changing my line of work.
When I was an undergrad, I started off wanting to eventually go into chip manufacturing, but halfway through, I shifted towards energy conversion and storage. I rely on this channel as one of the ways I still stay informed about the semiconductor industry.
Birds on a line don't add DC resistance but do add capacitance, thus adding to the AC impedance to a point that you can measure it if you wanted, with signal reflections even WHERE on the line they sit.
Pre high speed internet, I wired the telephone lines in my house in a star pattern. Had to change that as speeds increased due to the capacitance of the other lines. Now it’s just one line straight to the modem.
@@tonydoggett7627 dude, time to switch to twisted pairs for your phone lines! 😁 Seriously though, I've seen people use CAT-5E cable for their ADSL POTS line.
I don't think the general audience has reach THAT level of electrical engineering. AC & DC are very different animals. Still, NeXT is a real phenomenal in DC data buses and long parallel (untwisted) transmission lines.
But at 50/60 Hz and corresponding wavelength? Back in the day we referred to this situation as "fly poop in pepper".
@@erictayetbetter hope it's the cat 5e that's gel filled and rated for exterior exposure, preferably with a bonded aerial cable to take the strain weight of the wire 🤣
Dude, how do you produce so many incredibly good videos on such a consistent basis? I can't thank you enough for teaching me so much about the industry I work in, plus various other topics. You're one of the best resources for this kind of thing.
Another comment said information over visual style. Asianometry is closer to an audiobook than a video channel. Also insider info perhaps.
He has 50 workers in his basement working day and night to produce the next video. No Christmas, no new year, no Chinese new year...
I bet he recruits the retired TSMC engineers and locks them in windowless rooms with impossible deadlines until they finish the scripts of the videos.
12:20 the person second from the left is Lisa Su who's now CEO of AMD
No way...
Who’s Jensen Huang’s first cousin lol. The apples don’t fall far
You are missing critical information as to how TSMC "cracked" the low k dielectric issue at the 130nm node...specifically they didn't. What happened was that at the 130 nm node they went into a "partnership" with LSI Logic in exchange for fab capacity and a Low-k copper back end. In reality TSMC's low-k backend was as you've mention fluorinated oxide, which was "lower-k".
As part of the agreement LSI and TSMC "shared" their 130nm processes, LSI had a low-k/Cu backend that had been put together inside a year after the sales/marketing group changed their tack on what was required for the interconnect - initially they agreed a low-k/Al process was OK (which it was from strictly a data driven standpoint, but by mid process development Cu/Low-k were the buzzwords and they changed their requirements, hence the hasty development of the low-k/Cu backend).
This low-k/Cu backend used low-k from the 180nm process using Electrotech/Trikon Flowfill dielectric, that I believe was MSQ based. After we saw the FSG/Cu backend process that TSMC were using for their 130nm process, we had to transfer the Low-k/Cu process from our development to TSMC to be able to produce our 130nm material, so TSMC effectively were given all the information to run a true low-k/Cu back end process, effectively for free. It was universally agreed by the engineering staff who were required to do the transfer as a BAD IDEA, and was the beginning of the end for LSI Logic wrt to developing and manufacturing leading edge technology, but the corporate leadership thought is was a good idea as it saved on manufacturing investment, but at the expense of giving away the process crown jewels at that point in time.
interesting, I hope it will be mentioned in next videos and comment above get more likes.
Apparently it was LSI Illogic.
@thecraggrat Yes you are 100% correct - I was the provider of the Trikon Low-K "Flowfill" process which we put into production at LSI (not high volume) at 0.18 micron with aluminum. As LSI determined, it was the C in the RC constant that was where all the improvement could be most realized for the devices, and thats why they chose us and we partnered to deliver it. But yes there was some less than straight talk, and a decision to finally partner with TSMC against the engineering team's recommendations, et voila' TSMC gets a free industry breakthrough from LSI. Whats more, the Black Diamond of AMAT where I went to work was a copy of the Trikon Flowfill Low-K process - same SiOC process except the silicon carbide barrier they call Blok. So it was not a TSMC breakthough but an LSI hand off. And once TSMC had it from LSI, LSI found their competitive edge lost as the entire industry had it now and they went fabless then sold the company.
As a Masters in Electrical Engineering student, these videos are providing me with very insightful additional resources for my courses. I thank you a lot for your hard work.
This was a great history of these technologies. As an engineer who has firs to hand experience with these lines and steps, I appreciate the background, and I see the same ongoing work and challenges with current industry shifts.
The problems and challenges are what thrust innovation through a select few that are willing and able to try something new. I'm waiting for torus shaped chips, maybe sphere in design. Might want to start linking physics with material sciences now that robots are becoming more accurate during the design process.
Small correction at 17:40 . This is an edge bead removal chamber used to etch away copper seed on the edge post electroplating. You can see a small grey arm used to dispense etchant on the edge of the plated wafer. Great video, love your content!
Two things delayed 300mm production. Photo lithography improvement (smaller lines). And copper’s pressure curve. Copper would deposit on vacuum pump lobes and make the pump useless within a week.
Remember early CMOS? No protection diodes. Everybody had to dress up. Repairs needed to be choreographed.
The designers define the product R x C as the "time constant" of an integrator. So the RC number is not "niche" as many said, but it is absolutely at the front of semiconductor technology in setting the maximum clock frequency of an IC.
Thank you for the incredibly well researched video.
Greetings,
Anthony
Does RC-delay contribute to higher voltage required for a higher frequency.
@@FTW23-qq8nb Actually, over the years, CPU and logic technologies have advanced in the direction of ever lower logic voltages. From nominal 5V in the 1970's, through 3.3V, 2.5, 1.8, 1.2, 0.8V. As new technology made each lower voltage feasible, it was adopted because lower voltage logic transitions (0 --> 1 or 1 --> 0) require less charging of the unwanted but ever-present "parasitic" capacitance. Also lower voltage allows smaller and closer features, facilitating higher density chips.
During any particular era, higher speed at a particular voltage has required higher _current_, to more rapidly charge the parasitic capacitance. So you will find that logic families that are contemporary with each other may have variants for low-power and low speed, or high power (higher current drivers) for higher speed.
A capacitor resists changes in voltage. Since current is bounded by resistance, there is a maximum voltage that can be achieved for a particular clock frequency. Lower the clock frequency, and you can increase the voltage and vice versa.
@@badtyprr Why does overclock then often require higher than stock voltage soc.
@@FTW23-qq8nb The time constant is the same but there is less time due to the higher clock speed to reach the logic threshold. With a higher voltage on the logic power supply the rise time to the fixed logic threshold is faster allowing the logic to operate properly when overclocked.
😅 May I just say, I find it very amusing that Asianometry would say 'Aluminum' while placing 'Aluminium' on the screen for us 😂
This video was one of the most satisfying videos I've seen in a while! It was sooo cool to learn soo much in just 40 mins! This, for me, was one of those videos that really made all the puzzle pieces I've been gathering over the years just fall into place together... Thanks! Your presentation of all this historic and scientific data was immaculate!
亲爱的亚洲测量学
作为一名IEEE技术极客，我对您最近分享的技术纪录片中所运用的无可挑剔和简明扼要的细节印象深刻。感谢您提醒我在IEEE行业工作时核物理学教育的重要性。这样的背景在未来的技术发展中是非常宝贵的。这部视频是您杰出工艺的产物，我很感激有机会见证专业知识和技术创新的交汇。
诚挚的问候,
宋我为你博士
Thanks for this fascinating and well written video!
Your narration / delivery is excellent - clear, well paced, informative, and yet just informal and human enough to warm the whole thing up and make it relaxing and fun.
I think this is my favorite of your videos. A great topic, given an excellent treatment.
Another GREAT video. It reminded me of my first term in digital electronics decades ago. I remember this innovation! IBM inventing copper on silicon, as it was called, back then. What I didn't realise was the rest of the industry catching up within the year. And yes the low-K dielectric problem took more time to crack. By that time, I have already moved to the software side of things. I remember my Polytechnic offering Micro-tronics (wafer fab) for the Mechanical engineering students.
I made copper dummy wafers for the new copper chip makers. The copper plating bath was unique. It deposited high purity copper preferentially in the bottom of trenches. By inhibiting deposition at the top of the trenches. This enabled filling deep high aspect ration trenches to be filled. Subsequent chemical mechanical polishing resulted in deep clean vias and a flat surface for subsequent deposition. Truly a game changer. And an exquisite example of the platers art.
TSMC enjoyed technology transfer for copper BEOL. It was only later that they started leading, after reaching parity with IEDMs. I know, I had to transfer and teach them. Novellus and IBM worked on the node and invented the capital equipment. Other American vendors worked with iedms on the stack. It was wall street and finance capital that pushed asset light strategy.
By the way, in the IBM copper team picture 12:19, that's Lisa Su, second from left.
omg you're right!
absolute chad, glad she went on to become such a powerful figure in the industry
Jon Deer,
Fantastic presentation as always!
Including the cat place holder where the photo was unavailable….
😃
Today I was having a bad pain day. I have Osteogenesis Imperfecta or Brittle Bones and have fractured over 150 times in my life. So I just smoked some thankfully legal weed and got on TH-cam and was blessed with a 30+ min Asianometry!
Your videos genuinely help me relax and feel better and I just wanted to say thank you for all the work you put into these videos. They are second to none. ❤
Yoo I have a neurological pain disorder, I'm just about to hit my prescription weed and try to sleep. Stay safe out there
Dont care
@@Aria432 Cared enough to post that you don’t care. That’s objectively a little caring 😂😝
You son of a... I have never been this thrilled and fascinated by a story about microchips. That was truly fantastic!
I have seen all your videos and this was by far the most exciting one. Remarkable work!
I like this channel. It's one of my top 5 favorites. You really found a niche, and tell good stories.
I ramped up Intel fab 22, their first full production copper fab. I worked in defect metrology. This sure brings back memories. I've spent literally thousands of hours looking at copper metal lines under a microscope.
Please do a RISC V essay please
gaboron
RISC V developing stopped 10 years ago, why you still use that ?
What processes you still run on RICS in 2023, or are you a Junk rat in Computers ?
StrongRisc ?
Lol the concept is new to me. Everything i know about semi conductors is from this channel started watching when their was a drought on that island and the chip shortage.
I bought Nvidia stock in 2021 because of this channel and i thought i discovered a little known technology that would disrupt the status quo.
thanks for sharing the knowledge @@lucasrem
@@gaboronem8615that person is trolling you.
@@SianaGearz i was happy people developed on Rick V, i was Archimedes, ARM + Risc
But he is clown ?
@@gaboronem8615 don't listen to that pedant and barely intelligible bozo spamming all over the comment section.
Jon covers historical topics, the RV disruption is just happening and there is not much to say outside the wikipedia page and media coverage.
I always find it odd how American English speakers say "niche"; anywhere that speaks British English (UK, Australia, etc.) pronounce it "neesh" in-line with its French origin. Thanks for the wonderful video John.
Not all American English speakers. I generally hear (and say) "neesh".
I guess you could say it’s a niche pronunciation
"nitsch"
We Americans don't know how to say it which is why you see three examples already in your replies. Lol
I've always heard/said "neetch".
@@mephInc I've been American my whole life and this is the first time I've ever heard that word pronounced with a hard consonant at the end. I've never lived or worked in the Pacific Northwest, Northeast, or Midwest, so maybe its said that way in one of those regional dialects.
I now understand why the later pentium 3 chips are code named coppermine.
Nope. It was too early for those chips to have copper interconnects. See the wikipedia page about the pentium 3 processor, coppermine section.
This gave me a deeper appreciation for the hard-won R&D miracles that go into the struggle for cheaper faster microprocessors. It's amazing to think of how far TSMC has come in a couple of decades. I for one would love to know more about the even more miraculous struggle to get us to 2nm.
I remember the introduction of copper interconnect. At the company where I worked, there was concern about the reactivity of Cu with Si02 and the difficulties posed by the barrier metals at that time - titanium and I think palladium and tungsten, which were all causing problems because they were such hard metals. But that speed pickup from Cu was irresistible. That's also when companies and foundries started to get very interested in better insulators/IMDs like 'Coral.'
Interesting that tantalum became the barrier metal of choice.
the pic of Kowloon walled city reminds me the first video that introduced me to your channel.
Very impressive research and excellent video presentation. I lived through the 250, 180, and 130 nm process nodes as a fab customer. Thank you for helping me relive this history.
Excellent program. Very interesting chronology. Learnt that Copper xan't be etched. Didn't know that. Also had not realized that the metal separation layer was a Tantalum compound. I can see now why it too IBM 15 years to develop it.
Thank you for your amazing work.
Hey Jon, great video. Long time sub to your channel. You deserve much more subs. That being said, what are your thoughts on Canon's nanoimprint systems that is suppose to compete with ASML's lithography machines? Would love a video and thoughts on advantages and disadvantages. Keep up the good work!
IBM's trouble with their lowK process impacted my employer at the time. They ended up moving to TSMC.
Also, another unexpected impact of finer pitch interconnects - especially the mid-level long runs - inductance! We ran into cross talk problems causing glitches that would cause latches to pop open when they shouldn't. 🤦
Yes, that's why all asics had to get past "noise checks"
So well put together and interesting!!! Wow thanks!
Seriously impressive video. Really respect the amount of research and effort you put into this.
Very good video - AMD using CVD to apply butter is a classic comment. Passing along a couple of historical comments: IBM always had a Ferrari type process in the wings that they didn't run or scale up. In 1979, the M1 & M2 pitches for NMOS 1 were 5.0 and 7.4um. The process used Polyimide dielectric (2.8 dielectric constant). Patterning the vias had topography issues that were related to reliability problems, but the biggest issue was that IBM never decided to ramp production - it was easier to use the internal technology as a bargaining chip.
This was well researched and well presented. Excellent!
15:34 "Sounds complicated and unintuitive? It is. (...)
All of this stuff just barely works, man." 😆
I love his timely, often quite humorous & apt interjections.
Birds hardly affect resistance but they do add capacitance :)
😁😁
Of course, birds aren't real - the drones decrease the resistance of the power line, selectively helping renewable power sources (wind, solar, hot air from right wing talk show hosts).
Thanks for the video. I was with AMD that time, and we had a good cooperation with Motorola for the copper process. I remember having at the begin a real grazy separation in FEOL and BEOL, production areas ,later it came clear it didn’t need to be that harsh.
I gotta wonder how long it takes to make one of these vids. Must take days to film and edit, but weeks extra for the initial research efforts. Amazing.
This is by far the most insightful video I’ve ever seen about the history of Cu/LK being introduced to the industry. I was lucky in almost all those scenes even they were so painful but finally we went through, and all the way to 50x smaller geometry now.
Wow that was seriously in-depth! Really well researched!
Incredibly niche but equally interesting! 👌
Thanks for all the research req'd to make such a detailed video.
You make among the best quality content on the subject. Not just on TH-cam but period. Niche is your strong suit.
That was awesome. Thanks for sparking the memories
15:53 You don't usually see "TL;DR:" and "Abstract:" quite so close to each other. 🤣
If it is legit, it predates the Wikipedia listed first use of it by almost a decade. I'm pretty sure it's just an easter egg for the pedantic. source: en.wikipedia.org/wiki/TL;DR
Either way, it is amazing. for different reasons, but contemplating it only makes it better. just amazing.
I remember i was in high school around this time, and cpu speed drastically increased over the course of several years. Went from 300, 400mhz to 500, 600, 900 and up, so quickly! I wonder if a good amount of it was due to this process.
Great overview. Thanks for this very detailed and informtive video.
Truly one of your best presented videos so far
I thought it was called Damascene because there's multiple layers of metal (tungsten-copper-tungsten), like in a damascene knife blade
Damascus you mean I guess
Hmm Copper Tungsten is a neat alloy. Works very well as submounts where low thermal expansion and good thermal conductivity are needed. Mounted a lot of AlGaAs laser chips on the with AuSn solder. ❤
Thanks for citing the papers, they really help in understanding the tradeoffs.
I liked the cat picture.
Seriously though, this was incredibly interesting to learn about.
2:30 missed the opportunity for a bladerunner "interlinked" reference
4:53 "...were the circuits like freeways? I kept dreaming of a world I thought I'd never seen."
AMD CEO Lisa Su was working in Copper interconnect in IBM and she was also shown in the photo at 12:29.
Very informative - thank you - still got lost between spin-offs and their spin-ins
I'm not sure what could be too niche, so far every video I've watched in the last few years from you has been captivating 😅
Amazing, what a great history lesson .. well done !!!
Longer but very educative vid. Excellantly explained, thx a lot!
Fascinating story I’ve never heard of. Thank you very much!
Amazingly well researched, thanks for your insights!
It's crazy how many developments and innovations there are in semiconductors that practically no one knows about and we all take for granted every day.
Very nice, remember reading about it way back when, now I'm smart enough to understand what exactly were they doing there.
From an audio point of view an RC network implements a "low pass filter." Same effect.
Nice video, but I feel a little disappointed that you never explained more about the low-k PECVD method at the end. Though you got pretty close by mentioning brand names like Black Diamond and references to the PECVD manufacturer like Novellus. I looked into these low-k PECVD layers: it seems to be "carbon doping" an SiO2 layer (while it's being deposited) to obtain SiOCH. There's various precursors that can be used, and making the layers more porous also helps.
I seem to remember that one of the processes on the dielectric was that it had to be mechanically stressed in one direction - but I can't remember the exact details.
I am happy to see the trench resident interconnect idea being used. I patented a version of the idea in 1991 while working for Harris Semiconductor.
Oh and I wanted to ask if you have researched anything about the experiments with fabs in space.
There are lots of interesting things with growing the crystals in space but I haven't really seen how any of the benefits could be applied.
I mean it seems like gravitation when laying down layers is a big problem. If all layers could be deposited in microgravity, then deposition would be completely regular with maybe only quantum irregularities in the materials.
I guess in near future, shipping space is still way too expensive for most industry.
I really liked that you used plenty of graphics for this one, also great graphics choices.
Your historical report on this copper breakthrough seems like a headline article from an "Investigative Journalist's" 3 year study.
I know nothing of these molecular fabrication processes, nor the enormous financial risks big companies take in edging out their competitors (so we can watch yachts racing across our computer monitors).
After watching your episode, I feel much better informed about the tiny electronic world I hold in my hands every day. Thank You!
Thanks for the short and informative lecture 👍
I am a former Nikon Photolithography tech from IBM Burlington(technically in Essex Jct), now owned by Global Fundries. You are spot on with your A&P of the terms. Good job.
Thanks for in-depth research!
I remember working for Intel in the fab. We separated copper processing from conventional. The people working in copper wore orange gowning. If we brought a hand tool in from the conventional area to copper area, it had to stay there.
Great stuff. Love the semiconductor stuff. (Ok, so the Al/Cu stuff is conductor stuff - still awesome!)
Great video. Also, without CMP none of the copper work would have rounded the corner. No one remembers the floor polishers that righted the Kawloon Walled City. The ASML hardware for litho was also paramount all the way to today, especially for the latest size battle between the giants.
Great video. I'm a layman in the field but found it very interesting. Thanks.
It would seem a pretty obvious way to get copper down on a chip would be to use electroless copper deposition. We were using it all the time in the late 70’s in pca manufacturing. You also mentioned that there is no way of etching out copper -ferric chloride! ( although I am sure that there are reasons why it is not applicable-I am not into chip making-I do love these videos-terrific work-keep them coming 😊
Seconded. I thought something similar.
Also, the copper in my water pipes doesn't easily dissolve in water to cause a toxicity problem. I suspect he is probably referring to soluble Cu+2 salts in the waste stream.
I'm not in chip making either (a Chemist) but learn a lot from these videos.
Ammonium persulphate.
Excellent video as always! 😊
Interesting. I always learn something new about semiconductors from this channel.
great explanations. Love this channel
Very interesting Jon, niche is good , so few people make these kinds of video essays
Only Mass production is profitable,
Why you understand nothing, why moderate posts ?
I love how all the names of stuff are so straightforward like wow, its named just what it is
This was amazing your insight into the industry is incredible. I didn't realise Cooper was so hard at those scales considering the industry built every PCB on this stuff using photo resist. Electro plating seemed to be an obvious choose for the copper layer though at least from a predictable repeatable manufacturing process. The high K chemical make up was vary interesting I actually thought Intel was first to market with high K but I guess there has always been different implementation some better than others. It's also interesting how IBM seemed to be behind or only slightly ahead, I thought they were cutting edge. It really sounds like the research at TSMC is top not and it is not just there access to EUV.
crazy how fun and engaging these historical storylines can be
How on earth you understand such deep electronics dude? You are brilliant!
I kinda vaguely recall that he had mentioned in several of his previous videos, that his father has worked somewhere in the industry at some level.
@@0neIntangible Yes. But my father worked in pharmaceutical marketing. And I work in Biotech. Related field, yet I got no clue on marketing of any sort. So, in the end its mainly Mr. Jon's brilliance.
WoW!! Fascinating stuff! Well done!!
I worked at National Semiconductor in the late 90s as an analog ckt designer (and not very good one at that), but I had no idea of all the drama going on in the fabs! I was working with VIP3 and CS65 for analog and mixed signal stuff.
Another great video, Jon! Thank you
That was such a gripping Story
a Crime Novel is nothing compared to that !
2 Giants and a small one fight .. and what a Final - WOW !
Thanks for this exceptional video !
I love this videos they are what inspire me to continue sharpening my knowledge base
Great work, as always.