@@jkobain Windows 10 and 11 continue to *dominate* the world, in December of 2024. Almost every Fortune 500 company trusts Windows to get the job done, 24/7. macOS has a tiny 10 percent market share, after 40 years in business. Truly an embarrassment.
Wow, Dr. Gusman has made a lot of progress on this since I checked it out a year ago running on my own pico. The software didn't quite have the features I was in need of back then, so I shelved my project. It seems like the updates are enough for me to resume progress on the project, so I'll dust it off in a few weekends. Thanks for demonstrating the recent updates!
At 23:22 - It's not DRAM refresh, it's the I/O read (the immediately preceeding instruction is IN A, (C) - which in reality is IN A, (BC). Port FBFE is a ULA read such that it reads the part of the keyboard matrix. You will expect FF if no keys are being pressed (a key press will bring a databus line low). More strictly, it's port xxFE - and the high 8 bits will cycle through as it's scanning the keyboard matrix. DRAM refresh only occurs when the RFSH signal is asserted.
Wow! This is an amazing piece of hardware and software development - probably far beyond what the silicon developers at Raspberry Pi ever considered when they created the PIO modules for their chips. Also, a really clear and well presented video on what could be quite a challenging subject. Logic analysers have come a long way since I first used one around 35 years ago (also to follow the code execution of a CPU, incidentally).
You are not normal, do you know that. I love what you show. This analyzer is a great solution. My first analyzer had 6 channels, but that was... 30 years ago. Many thanks!
This looks great! For those of us with less focus on retro tech it would really help if there was a 1.8 V reference voltage built into the board as that's a super common voltage nowadays :)
Love This! I work for a small company and we're unable to buy a logic analyzer. I'm designing a replacement for the Teradyne D300 Hardware modeler and debug at speed has been a little challenging. I'm hoping to get some of these made and dig into protocol decode for the D300 backplane to make my life easier, and get the black box hardware simulations to match a legacy D300. Thanks for your work on this!
If you have not read up on the Nyquist frequency, please do. Your sampling frequency for accurate representation of a signal is at least 2x the maximum frequency you expect to sample, otherwise, you will experience aliasing and see false signals.
@@HappyLittleDiodes I will but now It's on processing and I really need some help. My 2 ADC channels takes 16 pin IO, another 4 for LCD, 2 for ADC clock (interleaved mode), left 4 pin with all bunch of buttons, encoders and relay control.
Really thanks for your comments. That was my big problem I got before. I settled Pi overclock up to 250MHz then PIO can generate 125MHz clock the the ADC. About aliasing - my low analog front end design couldn't get that high frequency.
Interesting project. I will definitely be checking it out. The pin grabbers are a big part in how easy it is to use a LA. BTW, on the subject of PCB design, the general rule of thumb is to keep the traces short. You have traces running from the middle of the board to near the edge down, then back over about half the width of the board. You could have brought many of them down between the pin headers without first running the traces near the board edge.
It may not matter on low frequency systems like the Z-80, but as the frequency goes up trace length becomes a concern. You generally want all related traces (e.g. data, address, and control lines) to be the same length to avoid signals arriving out of sync with each other. This is one of the reasons so many modern high speed interfaces are serial instead of parallel. (along with fewer wires/traces needed)
@@tconiam Right. It won't matter that much on the low frequencies of that system so trace length matching is also not an issue. Neither is possible cross-talk between close traces.
Very nice video and I'm really impressed with the developments of the software, great to be able to use SigRok decoders as that was the main reason I would export and use SigRok, cool to be able to stay in the picoLA software only. Glad I sent that original PCBs to you now 😂!
The problem with most MCU logic analyzers is the sample buffer size. For the Pico 2, it's 2.5 times larger than the original Pico but still only captures very small chunks at higher speeds. At 400 MHz, the buffer fills up in just 1.28 ms.
Too bad it doesn't look like this can be externally clocked - if you're working with a Sinclair Spectrum, it would be nice to clock it off the machine's own 3.5 MHz clock, then you could record massive amounts of data from the machine.
Thanks for the video, I'll definitely try this software with my pico ! About the PCB design, I advise you to loose the instinct of wanting to nicely bundle up signals close to each other and route them around the periphery of the board ;) it's probably bad for EMI and could cause some false pulses on your lines. I know it's tempting to "cable manage" them nicely in a corner but it's a common mistake I have made lots of time 😅
why so?? "it's probably bad for EMI and could cause some false pulses on your lines" if you could briefly explain, I would be ever obliged, or maybe throw a pair of guiding words to search for the info??
Interesting video. The delay of level shift IC is 7.4ns, RP2350 is running around 160Mhz. Normally, the GPIO pin will work under 100Mhz or less. No high speed capture device, No buffering....
Well done on cutting your first board. The inevitable bodge wires are just part of the process and their numbers increase with board complexity. On the connectors that are too long, generally if you pull on the pins they will come out and are handy to keep in case you need to replace something later on. A Hacksaw and file can then be used to correct the length of the connector housing. Not sure how it works for footprints in your design tool, but snapeda is worth a look, you can get footprints and symbols for many devices, which simplifies creating the boards and reduces errors with bad pinouts / footprints etc.
Fascinating. I am going to have to build a few of these.
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Those FEFE and FDFE and so on are just IO operations. Check the /IORQ signal on the bus to see it better. Sinclair changes the higher byte of the IN A,(C) - which is in fact IN A, (BC) as the B register (higher part of the BC register) is put on the address bus during IO operations. It is a side effect, but widely used in the Z80 world. Data on the data bus are, what the IO port reads. Refresh is done at the last cycle of the Machine cycle and puts register pair IR on the address bus as well, as it activates /RFSH signal. Register R is only 7bit.
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To expand on keyboard reading. Sinclair reads the state in eight subsequent steps. Each for one keyboard "row". Keyboard has 40 keys organized into 8 "rows" of five keys. rows are connected to the A15-A8 address lines with diodes and the five keys in a "row" are connected to the ULA, where they make the lower five bits D0-D4 if the input port FE (which is also a simplification as it requires just A0 == 0 and IORQ == 0 to activate). D6 is the "Ear in" tape reading input bit. So the reading routine sets one row low, which makes possible to read zero in a bit corresponding to a pressed key in the selected row. The same it goes with all eight rows.
This looks great. I'll definitely be building a few soon. I designed an FPGA-based Logic Analyzer years ago, but never had it made. That used a Cyclone IV (I think?), and FT601Q USB 3.0 chip. That had 64 channels, but could only manage up to about 33 MHz sample rate, unless something like RLE compression is used. But then I saw the CoLA project on sikrok, which is almost exactly what I wanted, but has 96 channels. (I'm a bit hazy on the info below, so there may be some mistakes)... The problem is, CoLA has some quite serious issues with the standard version of Pulseview, because of some FTDI DLLs which aren't open source, or something. You can compile a version of Pulseview with the FTDI binaries included, but I never did manage to get it compiled. lol CoLA also uses a six-layer board, and an oversized Cyclone V, so would be quite expensive to have made. The thing is, those LAs should be capable of streaming directly via USB 3.0 at high speeds, so you can do VERY long captures, directly into RAM on the PC. I'm wondering if there's any way the Pico project could do something similar? AFAIK, the Pico and Pico 2 USB only works up to 12 MBits, though, so that could be a problem for doing long captures to the PC.
I just read some of the README on github. I saw the issue with the Pico 2, which seems quite bad. One of the things I really need a fast LA for, is to help reverse-engineer a modern DLP chip (DMD). I made some progress with that before, by hooking up a projector's LVDS signals to an FPGA dev board. (The intention there, was to build my own three-chip DLP projector, basically.) But I could never *quite* get pixels loaded onto the DMD using my own Verilog. :( It could be very interesting to try the Pico LA with an extension board that has LVDS receivers on it. Even if it can only capture for a relatively small amount of time, multiple captures could probably be joined together. There might even be a way of doing a kind of double-buffering thing, using two or more Pico LA modules. So one Pico is sending the data to the PC, whilst the opposite Pico is capturing more samples, and so-on.
btw, I think a really neat addition to the sigrok decoders would be... To have it actually display what is getting written to the video output on the Speccy. lol Assuming enough samples could be captured at once, the software could reconstruct what is being displayed by the Speccy. And / or, a way to display a hex view of any writes to Speccy DRAM, so a kind of mirror of everything that should be in DRAM. ie. Rather than having to capture the DRAM writes after reset, the Pico just uses a small chunk of memory as a "mirror" of whatever the Z80 is writing to Speccy DRAM. That way, you can keep doing multiple captures on the LA, to update the hex display of DRAM on the PC side.
I did a project on FPGA a while back which does something similar... The FPGA itself generates VGA output with Hex values displayed, for a small chunk of memory. You hook some the FPGA GPIO pins to the device-under-test, which in my case was a Roland D-20 synth board. That allowed me to view a "mirror" of memory, and showed in realtime whatever the CPU was writing to memory and/or mem-mapped registers. That can be a VERY powerful way to help diagnose faulty systems, or reverse-engineer the register map. I used that to help figure out the registers in the LA32 synth chip. I could hit a few keys on a MIDI keyboard, or tweak some CC values, and instantly see the register values update on-screen. It would have taken me about ten times longer to figure anything out from LA captures otherwise.
Oh, even better... I forgot the Pico can be used to output RGB/VGA or even HDMI directly. ;) I know there are projects like RGB2HDMI which use a Pico to output higher-quality video from retro systems. Something like that could be added to the Pico LA software, just not necessarily updated in realtime. Sorry, I know that's a lot to read, but this project just happens to coincide with a lot of what I've wanted for a while.
All of these things are great thoughts, I have a plan to snipe graphical data from the data bus to do fun stuff with LED strips and Phillips Hue bulbs. Maybe the pi could do this all in one
Z80 use the address and data bus in two modes - memory access and input/output. Since the code is about reading the keyboard its likely the port address and I/O data you see. Be curious. Feel free to ask or reach out to me.
You could use a 40pin chip clip, you’d wire it for the z80 and clip it over, quick way to get access to the voltages, clock, address, data and irq lines.
Thanks, this is a nice project to look at. I do own a Saleae Logic Pro 8 and a Siglent oscilloscope with 16 channel logic analyzer. Both are more than fast enough for my use but I sometimes lack more channels so the option of combining multiple of those Picos together sounds nice. The program looks good too. I often want to measure clock cycles and that seems to be much easier with this thing. The sockets that are too long are easy to cut to length. Just use a small metal saw to cut the strip right where the first unused sockets are and the file down the socket to a flat spot. I do this a often when I I cannot get the right socket length.
With printing to test, make sure your printer prints to scale first. Print a 10cm square and measure it with an accurate ruler (many plastic rulers are badly inaccurate too 😂). Make sure you check width and height, they're often out in both dimensions. Once you know how your printer scales what it prints, you can scale to correct before printing.
I wondered if you could use different reference voltages on groups of channels when "daisy-chained", since it's quite common to have 3.3 and 1.8 in addition to 5 V... An associated question would be: what voltage is possible with external reference? Project looks amazing! ( I remember paying $3500 for 32 channel analyzer in 1982, and $5,000 for a 100 MHz Tek 465)
The project states a serious problem with the Pico 2 that may impact the usefulness when using a Pico 2. The issues have been mainly addressed, but YMMV.
If you place the logic analyser connectors on the reverse side of the Spectrum interface board then the board doesn’t need to be larger for toast rack style machines.
That's true for one analyser, for two though it's more difficult to package, you'd need a double height ( or more) socket for the 2nd analyser and I'd be worried the weight imbalance could cause issues with the connection to the edge connector
@ I’m not sure weight would be an issue (some of the old spectrum expansion boards were a bit hefty). You could place the connectors on the back so that one analyser is vertical and the other is horizontal. Place a support under the horizontal board if you are worried.
Nice project and video ! I may be wrong but it seems that you length tuned you’re data lines based on the PCB it self but you didn’t take in account the pico board which has different lengths from io pads to the microcontroller. I don’t know if the pcb layout of the pico 2 is open source to check that
I don't know if the speeds on the ZX80 require it, but it might be a good idea to get all traces to about the same length on your adapter board like the logic analyzer pcb did with the squiggly lines
Not needed because the signalling bandwidth of a Z80 system using TTL is very low however the trace spacing could be wider and accompanying signal return paths kept close to the signals to minimise crosstalk. We just need to ensure that the total trace lengths are acceptably short.
V2 is much more practical than the original two board solution but 24 channels is not really sufficient even for an 8 bit micro. 32 channels is the realistic minimum for this kind of work and so requires two complete units. Sampling should generally be done at a minimum of 5x the frequency of the signals being measured so 20MHz should be fine for a Spectrum without wasting samples. I am sure that you should be able to find an appropriate header template for the Spectrum user port in the Kicad libraries. Using this world simplify design and prevent problems with components not fitting. The more you get into PCB design the more fun it is! 😁👍
Nice project. I will definitely make one, but there appears to be no PCB design currently available. Also, I note the logic analyser PCB has length-matched traces. At 40% c, propagation delay is 8.3 pico seconds/mm, so a mismatch of a few mm would hardly be noticable. Am I missing the point? Thx.
There's a batch of the latest design due for testing, there may be more updates after this :). Regarding the trace length matching I'm no expert but I don't see an issue with matching them if it can be done
Great Work!!! Do you have any idea about the release of this new design?!? I can't wait to build my copy!!!! ZX spectrum was my first computer when I was 6 years old! Rediscovering it with your videos is such a joy!!! Thank you so much!
I could probably do a good job of that but the tools all belong to my work and I can't afford them myself. A software license for vector CANApe might be 10k!
Without having seen the video - how or where do you write the data in that speed to? Does this profit from the strategy DDR RAM is organized - fast access to sequential blocks of data, but sloooow when trying to get/set really random bytes?
I recommend reading the GitHub pages, the Pico can over clock significantly, I understand. 400 MHz seems to be a hard limit of some kind which I guess is where the max frequency comes from
Interesting idea. It's still not clear to me how exotic the triggering is; probably nothing like a conventional analyzer. Thankfully I rarely ever need to fire-up my scope or logic analyzer (HP16500A) for debugging, as I embed a lot of diagnostics in my RasPi code as well as add hardware debug aids in projects that have an FPGA.
Great project, might put this together myself. Definitely agree about the excitement of designing and sending of for PCB's, even if making errors are extremely common place, it's just so easy to overlook stuff. Thank you for the tip about printing off design and checking against components, never would of thought of that.
very nice that should help fixing my spectrum's, also did you mention your an auto electrician i have a Mitsubishi gto that wont start are you close to manchester
I'm curious, how much pins of a PICO is 5V tolerant? I would like to see signals on my commodore 64, are level shifters are mandatory or some 100 ohm resistors will do the job ?
@@HappyLittleDiodes I know it's safer. I have one pico that i am willing to sacrifice in the name of science 🙂 Beside, pcb with level shifters will travel a month. Same as new pico, if current one is burned out. Nice weekend project, thanks for software 👍
There's no sponsor link in the github project, could you ask him to enable it, or maybe suggest the creator of the project to run a patreon? I mean I could raise an issue in the gh repo, but I think a closer contact would be better here. It'll help everyone who wants to help with the project. And wow this project it's really incredible
Always a good idea. I get lazy and set a bad example especially with new and cheap electronics. If you're somewhere cold and dry, you'll see sparks from static shocks. I work in Lapland once per year and believe me you could damage a board in those conditions
Totally confused by the post about pico2 is dead and not supported. Also is the analyzer only for the hardware and how to get it, … somehow if pico2 issue is solved ?
It will take a capture in a burst and has a hard limit for number of samples, as the data is transferred via relatively slow USB that's how it has to work
Keep an eye on the GitHub. I'm not sure what the story is with building this yourself, but I do know that people were downloading the V6 data while it was still in the works and potentially not ready, so maybe it's just temporarily down until a design is finalised
Como eu gostaria de entender tudo isto, veja esta placa pode medir até 400MHZ, por exemplo se eu utilizaar placa Teensy 4.1 que opera até 600MHZ será que ao invés de usar Pico poderia usar placa teensy 4.1 assim poderia medir até 600MHZ.... eu poderia utilizar uma placa desta para montar o meu próprio osciloscópio? Eu precisaria entender como usar este tipo de placa por exemplo em um sistema de elétrica/eletrônica para a minha CNC.....
I don't think it's important for the relatively low frequencies we're dealing with on the ZX Spectrum (3.5 MHz), but I'm happy to be corrected on that!
The traces inside the Spectrum itself will not be length corrected, and there are multiple Spectrums with different trace lengths (would need a different design for each Specy board). Luckily, the Spectrum runs at such a slow clock rate that it's not a requirement anyway.
RP2350 itself ought to happily run its PLLs from 10MHz input reference... pico boards are hard-wired to a crystal though, and the other clock inputs cannot drive the PLLs, only the clock mux itself. I believe the result is this is trivial with a custom board, and impossible for an unmodified pico. Addendum: if you're sampling ~10x or higher above the external clock, you're getting all the relevant edges, if by 128x or more you have 7 whole bits of phase information about the rising and falling edge of every bit. You can sample an external clock using your own free-running clock, and reference signals to it in software if your input clock is under ~8MHz itself.
You should add some more ground vias near where signals enter and exit the board, also near splits/borders of the groundplane. Connecting the ground plane in way that DC can flow is not the same thing as ensuring high frequency signal integrity. It will also improve signal integrity to add some ground-carrying pins in between your signal pins in the connector, high frequency signals always need a low impedance return path, otherwise you'll be severely limited in bandwidth. A 400 MHz squarewave has harmonics well into the Gigahertz range, you'll need to improve the grounding to be able make use of the highest sample rates this board offers. I highly recommend this video on the effect of ground plane stitching: th-cam.com/video/nPx2iqmVAHY/w-d-xo.html
Are you referring to the design of the logic analyser PCB? Or the interface PCB? If you have insights into the LA PCB design then I'm sure the designer would be interested
I could do that for my ZX Spectrum purposes, it would then be much less flexible though as I could only use it for those machines via the edge connector
I included it in the thumbnail, I felt that if I waved this single device around saying it can do 120 channels it's not totally accurate, since you need 5 of them to achieve that
Software is available for Windows, OSX and Linux. Be sure to support creators with these kinds of projects. Thanks for watching! ❤
Too bad, no support for macOS.
@@DerekDavis213 Yes there is. For both Intel and Arm systems as well.
@@bruwin I was just joking, because you mentioned an old obsolete operating system (OS X).
@@DerekDavis213 he actually mentioned Windows, another old and obsolete OS.
@@jkobain Windows 10 and 11 continue to *dominate* the world, in December of 2024.
Almost every Fortune 500 company trusts Windows to get the job done, 24/7.
macOS has a tiny 10 percent market share, after 40 years in business. Truly an embarrassment.
Wow, Dr. Gusman has made a lot of progress on this since I checked it out a year ago running on my own pico. The software didn't quite have the features I was in need of back then, so I shelved my project. It seems like the updates are enough for me to resume progress on the project, so I'll dust it off in a few weekends. Thanks for demonstrating the recent updates!
At 23:22 - It's not DRAM refresh, it's the I/O read (the immediately preceeding instruction is IN A, (C) - which in reality is IN A, (BC). Port FBFE is a ULA read such that it reads the part of the keyboard matrix. You will expect FF if no keys are being pressed (a key press will bring a databus line low). More strictly, it's port xxFE - and the high 8 bits will cycle through as it's scanning the keyboard matrix. DRAM refresh only occurs when the RFSH signal is asserted.
Dr. Gusman is an absolute legend! AWESOME project!
Wow! This is an amazing piece of hardware and software development - probably far beyond what the silicon developers at Raspberry Pi ever considered when they created the PIO modules for their chips. Also, a really clear and well presented video on what could be quite a challenging subject. Logic analysers have come a long way since I first used one around 35 years ago (also to follow the code execution of a CPU, incidentally).
It's cool PCB way works with small channels like yourself. I've never used them yet but it's such a cool service for makers.
Yes I appreciate their support
PCBWay are great, I've made at least 10 boards via them and they are consistently good in delivery and quality.
You are not normal, do you know that. I love what you show. This analyzer is a great solution. My first analyzer had 6 channels, but that was... 30 years ago. Many thanks!
This looks great! For those of us with less focus on retro tech it would really help if there was a 1.8 V reference voltage built into the board as that's a super common voltage nowadays :)
Love This! I work for a small company and we're unable to buy a logic analyzer. I'm designing a replacement for the Teradyne D300 Hardware modeler and debug at speed has been a little challenging. I'm hoping to get some of these made and dig into protocol decode for the D300 backplane to make my life easier, and get the black box hardware simulations to match a legacy D300. Thanks for your work on this!
Astounding and marvelous !!! Thanks for sharing. Hats off to El Dr Gusman too!
It's good to here that. I'm now making an Oscilloscope base on Pi Pico. It worked! I can get 125Msps sampling rate. Thanks for your video!
Can we see it? Could you join the discord and share?
If you have not read up on the Nyquist frequency, please do.
Your sampling frequency for accurate representation of a signal is at least 2x the maximum frequency you expect to sample, otherwise, you will experience aliasing and see false signals.
@@HappyLittleDiodes I will but now It's on processing and I really need some help. My 2 ADC channels takes 16 pin IO, another 4 for LCD, 2 for ADC clock (interleaved mode), left 4 pin with all bunch of buttons, encoders and relay control.
Really thanks for your comments. That was my big problem I got before. I settled Pi overclock up to 250MHz then PIO can generate 125MHz clock the the ADC. About aliasing - my low analog front end design couldn't get that high frequency.
Great video! I designed and programmed many games for the Spectrum back in the day and it's always good to see this kind of material on TH-cam.
Glad you enjoyed it!
Interesting project. I will definitely be checking it out. The pin grabbers are a big part in how easy it is to use a LA. BTW, on the subject of PCB design, the general rule of thumb is to keep the traces short. You have traces running from the middle of the board to near the edge down, then back over about half the width of the board. You could have brought many of them down between the pin headers without first running the traces near the board edge.
Thanks for the design tips. I wanted it neat and aesthetic, something I'm going to have to learn to let go of!
@@HappyLittleDiodes Running traces neatly and having nice aesthetics don't have to be mutually exclusive.
It may not matter on low frequency systems like the Z-80, but as the frequency goes up trace length becomes a concern. You generally want all related traces (e.g. data, address, and control lines) to be the same length to avoid signals arriving out of sync with each other. This is one of the reasons so many modern high speed interfaces are serial instead of parallel. (along with fewer wires/traces needed)
@@tconiam Right. It won't matter that much on the low frequencies of that system so trace length matching is also not an issue. Neither is possible cross-talk between close traces.
Very nice video and I'm really impressed with the developments of the software, great to be able to use SigRok decoders as that was the main reason I would export and use SigRok, cool to be able to stay in the picoLA software only. Glad I sent that original PCBs to you now 😂!
Thanks for that! 👍🏻👍🏻🙏🏻
The problem with most MCU logic analyzers is the sample buffer size. For the Pico 2, it's 2.5 times larger than the original Pico but still only captures very small chunks at higher speeds. At 400 MHz, the buffer fills up in just 1.28 ms.
Too bad it doesn't look like this can be externally clocked - if you're working with a Sinclair Spectrum, it would be nice to clock it off the machine's own 3.5 MHz clock, then you could record massive amounts of data from the machine.
@74HC138 that may come in the future
Testing with a printed, printed circuit board is a neat idea, I haven't heard that before.
The sample frequency thing is called Nyquist-Shannon sampling theorem
Thanks for the video, I'll definitely try this software with my pico ! About the PCB design, I advise you to loose the instinct of wanting to nicely bundle up signals close to each other and route them around the periphery of the board ;) it's probably bad for EMI and could cause some false pulses on your lines. I know it's tempting to "cable manage" them nicely in a corner but it's a common mistake I have made lots of time 😅
Thanks, I was constantly thinking this while making everything look neat. It's the beginning of a long learning journey
why so?? "it's probably bad for EMI and could cause some false pulses on your lines" if you could briefly explain, I would be ever obliged, or maybe throw a pair of guiding words to search for the info??
Thank you for the informative video. I love these more advanced tool videos.
Simply amazing! Thanks for sharing
Interesting video. The delay of level shift IC is 7.4ns, RP2350 is running around 160Mhz. Normally, the GPIO pin will work under 100Mhz or less. No high speed capture device, No buffering....
Such an awesome project!!
This is really amazing! Awesome and great ingenuity!
This is amazing! Wonderful video.
Well done on cutting your first board. The inevitable bodge wires are just part of the process and their numbers increase with board complexity.
On the connectors that are too long, generally if you pull on the pins they will come out and are handy to keep in case you need to replace something later on. A Hacksaw and file can then be used to correct the length of the connector housing.
Not sure how it works for footprints in your design tool, but snapeda is worth a look, you can get footprints and symbols for many devices, which simplifies creating the boards and reduces errors with bad pinouts / footprints etc.
Valeu!
Thank you! 🙏🏻
Really good device, thank you for sharing.
Great video, need project!
Fascinating. I am going to have to build a few of these.
Those FEFE and FDFE and so on are just IO operations. Check the /IORQ signal on the bus to see it better.
Sinclair changes the higher byte of the IN A,(C) - which is in fact IN A, (BC) as the B register (higher part of the BC register) is put on the address bus during IO operations. It is a side effect, but widely used in the Z80 world.
Data on the data bus are, what the IO port reads.
Refresh is done at the last cycle of the Machine cycle and puts register pair IR on the address bus as well, as it activates /RFSH signal. Register R is only 7bit.
To expand on keyboard reading. Sinclair reads the state in eight subsequent steps. Each for one keyboard "row". Keyboard has 40 keys organized into 8 "rows" of five keys. rows are connected to the A15-A8 address lines with diodes and the five keys in a "row" are connected to the ULA, where they make the lower five bits D0-D4 if the input port FE (which is also a simplification as it requires just A0 == 0 and IORQ == 0 to activate). D6 is the "Ear in" tape reading input bit.
So the reading routine sets one row low, which makes possible to read zero in a bit corresponding to a pressed key in the selected row. The same it goes with all eight rows.
Excellent! Thanks
This looks great. I'll definitely be building a few soon.
I designed an FPGA-based Logic Analyzer years ago, but never had it made.
That used a Cyclone IV (I think?), and FT601Q USB 3.0 chip.
That had 64 channels, but could only manage up to about 33 MHz sample rate, unless something like RLE compression is used.
But then I saw the CoLA project on sikrok, which is almost exactly what I wanted, but has 96 channels.
(I'm a bit hazy on the info below, so there may be some mistakes)...
The problem is, CoLA has some quite serious issues with the standard version of Pulseview, because of some FTDI DLLs which aren't open source, or something.
You can compile a version of Pulseview with the FTDI binaries included, but I never did manage to get it compiled. lol
CoLA also uses a six-layer board, and an oversized Cyclone V, so would be quite expensive to have made.
The thing is, those LAs should be capable of streaming directly via USB 3.0 at high speeds, so you can do VERY long captures, directly into RAM on the PC.
I'm wondering if there's any way the Pico project could do something similar?
AFAIK, the Pico and Pico 2 USB only works up to 12 MBits, though, so that could be a problem for doing long captures to the PC.
I just read some of the README on github. I saw the issue with the Pico 2, which seems quite bad.
One of the things I really need a fast LA for, is to help reverse-engineer a modern DLP chip (DMD).
I made some progress with that before, by hooking up a projector's LVDS signals to an FPGA dev board.
(The intention there, was to build my own three-chip DLP projector, basically.)
But I could never *quite* get pixels loaded onto the DMD using my own Verilog. :(
It could be very interesting to try the Pico LA with an extension board that has LVDS receivers on it.
Even if it can only capture for a relatively small amount of time, multiple captures could probably be joined together.
There might even be a way of doing a kind of double-buffering thing, using two or more Pico LA modules.
So one Pico is sending the data to the PC, whilst the opposite Pico is capturing more samples, and so-on.
btw, I think a really neat addition to the sigrok decoders would be...
To have it actually display what is getting written to the video output on the Speccy. lol
Assuming enough samples could be captured at once, the software could reconstruct what is being displayed by the Speccy.
And / or, a way to display a hex view of any writes to Speccy DRAM, so a kind of mirror of everything that should be in DRAM.
ie. Rather than having to capture the DRAM writes after reset, the Pico just uses a small chunk of memory as a "mirror" of whatever the Z80 is writing to Speccy DRAM. That way, you can keep doing multiple captures on the LA, to update the hex display of DRAM on the PC side.
I did a project on FPGA a while back which does something similar...
The FPGA itself generates VGA output with Hex values displayed, for a small chunk of memory.
You hook some the FPGA GPIO pins to the device-under-test, which in my case was a Roland D-20 synth board.
That allowed me to view a "mirror" of memory, and showed in realtime whatever the CPU was writing to memory and/or mem-mapped registers.
That can be a VERY powerful way to help diagnose faulty systems, or reverse-engineer the register map.
I used that to help figure out the registers in the LA32 synth chip.
I could hit a few keys on a MIDI keyboard, or tweak some CC values, and instantly see the register values update on-screen. It would have taken me about ten times longer to figure anything out from LA captures otherwise.
Oh, even better...
I forgot the Pico can be used to output RGB/VGA or even HDMI directly. ;)
I know there are projects like RGB2HDMI which use a Pico to output higher-quality video from retro systems.
Something like that could be added to the Pico LA software, just not necessarily updated in realtime.
Sorry, I know that's a lot to read, but this project just happens to coincide with a lot of what I've wanted for a while.
All of these things are great thoughts, I have a plan to snipe graphical data from the data bus to do fun stuff with LED strips and Phillips Hue bulbs. Maybe the pi could do this all in one
Z80 use the address and data bus in two modes - memory access and input/output.
Since the code is about reading the keyboard its likely the port address and I/O data you see.
Be curious.
Feel free to ask or reach out to me.
Great answer, thanks!
@@HappyLittleDiodes I like your channel and it's great if I could contribute. However, check the facts, as always. :)
@LarsHHoog I stay modest and always make it known when I don't know the answer. Thanks for providing the facts
You could use a 40pin chip clip, you’d wire it for the z80 and clip it over, quick way to get access to the voltages, clock, address, data and irq lines.
That's a good option, but it's super nice to be able to do this without opening the machine
@ thanks for the video - I’ve liked and subscribed. I built a very rudimentary one in the 90s, using SRAM, ttl 74F octal buffers leds and counters.
Thanks, this is a nice project to look at. I do own a Saleae Logic Pro 8 and a Siglent oscilloscope with 16 channel logic analyzer. Both are more than fast enough for my use but I sometimes lack more channels so the option of combining multiple of those Picos together sounds nice. The program looks good too. I often want to measure clock cycles and that seems to be much easier with this thing.
The sockets that are too long are easy to cut to length. Just use a small metal saw to cut the strip right where the first unused sockets are and the file down the socket to a flat spot. I do this a often when I I cannot get the right socket length.
Thanks!
With printing to test, make sure your printer prints to scale first. Print a 10cm square and measure it with an accurate ruler (many plastic rulers are badly inaccurate too 😂). Make sure you check width and height, they're often out in both dimensions. Once you know how your printer scales what it prints, you can scale to correct before printing.
A cheap usb oscilloscope with pico would be nice. I'm aware there's a current one, but it relies on some paid for android app, and an android.
There's another comment in here where somebody has made one!
Great video. Very interesting content 👌👀
I wondered if you could use different reference voltages on groups of channels when "daisy-chained", since it's quite common to have 3.3 and 1.8 in addition to 5 V... An associated question would be: what voltage is possible with external reference?
Project looks amazing!
( I remember paying $3500 for 32 channel analyzer in 1982, and $5,000 for a 100 MHz Tek 465)
I would redirect you to drgusman's github page for all the techy info and to ask more questions :)
this is a fantastic project ... pcb fiiles for this version ?
Keep an eye on the GitHub for the latest news 📰
The project states a serious problem with the Pico 2 that may impact the usefulness when using a Pico 2. The issues have been mainly addressed, but YMMV.
I was hoping this early release finally fixed those problems. I’ve been following those developments closely too.
I just keep a new acronym!
If you place the logic analyser connectors on the reverse side of the Spectrum interface board then the board doesn’t need to be larger for toast rack style machines.
That's true for one analyser, for two though it's more difficult to package, you'd need a double height ( or more) socket for the 2nd analyser and I'd be worried the weight imbalance could cause issues with the connection to the edge connector
@ I’m not sure weight would be an issue (some of the old spectrum expansion boards were a bit hefty). You could place the connectors on the back so that one analyser is vertical and the other is horizontal. Place a support under the horizontal board if you are worried.
Nice project and video ! I may be wrong but it seems that you length tuned you’re data lines based on the PCB it self but you didn’t take in account the pico board which has different lengths from io pads to the microcontroller. I don’t know if the pcb layout of the pico 2 is open source to check that
I'm not sure precisely on that one, the designer (eldrgusman) is very smart and I'm sure did the best they could with the trace lengths
I don't know if the speeds on the ZX80 require it, but it might be a good idea to get all traces to about the same length on your adapter board like the logic analyzer pcb did with the squiggly lines
Not needed because the signalling bandwidth of a Z80 system using TTL is very low however the trace spacing could be wider and accompanying signal return paths kept close to the signals to minimise crosstalk. We just need to ensure that the total trace lengths are acceptably short.
I may have got carried away with neatening the traces
V2 is much more practical than the original two board solution but 24 channels is not really sufficient even for an 8 bit micro. 32 channels is the realistic minimum for this kind of work and so requires two complete units. Sampling should generally be done at a minimum of 5x the frequency of the signals being measured so 20MHz should be fine for a Spectrum without wasting samples. I am sure that you should be able to find an appropriate header template for the Spectrum user port in the Kicad libraries. Using this world simplify design and prevent problems with components not fitting. The more you get into PCB design the more fun it is! 😁👍
Thats just amazing
Really nice. Thanks
Creative, terima kasih:)
Nice project. I will definitely make one, but there appears to be no PCB design currently available. Also, I note the logic analyser PCB has length-matched traces. At 40% c, propagation delay is 8.3 pico seconds/mm, so a mismatch of a few mm would hardly be noticable. Am I missing the point? Thx.
There's a batch of the latest design due for testing, there may be more updates after this :). Regarding the trace length matching I'm no expert but I don't see an issue with matching them if it can be done
It was amazing!
cool stuff man !!!
Great Work!!! Do you have any idea about the release of this new design?!? I can't wait to build my copy!!!! ZX spectrum was my first computer when I was 6 years old! Rediscovering it with your videos is such a joy!!! Thank you so much!
Thanks! Keep an eye on the GitHub is all I can say. Feel free to join the discord where we chat about it often
I wonder id that can become an EEG board. Nice freaking job.
Could you do a video about automobile tools?
I could probably do a good job of that but the tools all belong to my work and I can't afford them myself. A software license for vector CANApe might be 10k!
Without having seen the video - how or where do you write the data in that speed to? Does this profit from the strategy DDR RAM is organized - fast access to sequential blocks of data, but sloooow when trying to get/set really random bytes?
I recommend reading the GitHub pages, the Pico can over clock significantly, I understand. 400 MHz seems to be a hard limit of some kind which I guess is where the max frequency comes from
Any way to get the new V6 PCBs yet?
Interesting idea. It's still not clear to me how exotic the triggering is; probably nothing like a conventional analyzer. Thankfully I rarely ever need to fire-up my scope or logic analyzer (HP16500A) for debugging, as I embed a lot of diagnostics in my RasPi code as well as add hardware debug aids in projects that have an FPGA.
So in the new version, one board by itself can measure 24 channels and the system can accommodate up to 5 boards?
Correct
@@HappyLittleDiodes Thanks!
Thanks for sharing
Which interface allows Pico to capture data at 400MSps?
Great project, might put this together myself. Definitely agree about the excitement of designing and sending of for PCB's, even if making errors are extremely common place, it's just so easy to overlook stuff. Thank you for the tip about printing off design and checking against components, never would of thought of that.
Great video
is there a link to pcbway for the PCB's
No but that's something the designer could do if they want
very nice that should help fixing my spectrum's, also did you mention your an auto electrician i have a Mitsubishi gto that wont start are you close to manchester
I am close to Manchester but I'm not so much an electrician as a development and test engineer
Is there a shop where I can buy this board?
See the GitHub page, link in description, I believe you can register interest to purchase boards via there
@ cheers 🍻
Восхитительная игрушка! :)
I'm curious, how much pins of a PICO is 5V tolerant? I would like to see signals on my commodore 64, are level shifters are mandatory or some 100 ohm resistors will do the job ?
My gut says it's safer to use the level shifters to be safe. They aren't very expensive after all
@@HappyLittleDiodes I know it's safer. I have one pico that i am willing to sacrifice in the name of science 🙂
Beside, pcb with level shifters will travel a month. Same as new pico, if current one is burned out.
Nice weekend project, thanks for software 👍
@@bakisha Pico 2 is 5v tolerant and absolutely Max is 5.5v
There's no sponsor link in the github project, could you ask him to enable it, or maybe suggest the creator of the project to run a patreon? I mean I could raise an issue in the gh repo, but I think a closer contact would be better here.
It'll help everyone who wants to help with the project.
And wow this project it's really incredible
I'll let them know!
powerful
Pico (Pico H) newbie here. So are anti-ESD wristbands overkill when working with boards?
Always a good idea. I get lazy and set a bad example especially with new and cheap electronics. If you're somewhere cold and dry, you'll see sparks from static shocks. I work in Lapland once per year and believe me you could damage a board in those conditions
why the use of level shifters ?
To measure systems that use different logic levels!
Totally confused by the post about pico2 is dead and not supported. Also is the analyzer only for the hardware and how to get it, … somehow if pico2 issue is solved ?
I believe the designer found a way around the pico 2 issue, however, the only benefit of Pico 2 for this project, at the moment, is more samples
yeah i need this! i have a dead dual Pentium Pro board i would love to nail down! and i have no Logic Analyser
Does the logic analizer support real time caption?
It will take a capture in a burst and has a hard limit for number of samples, as the data is transferred via relatively slow USB that's how it has to work
I see the PCB for Ver 6 sneds you else where and eventually to a dead link ... Is there going to be a prebuilt version of this now from Mr GusMann?
Keep an eye on the GitHub. I'm not sure what the story is with building this yourself, but I do know that people were downloading the V6 data while it was still in the works and potentially not ready, so maybe it's just temporarily down until a design is finalised
Hope it becomes available one way or another!
@101blog I'm certain it will
Sent him an email a couple of days ago, he's waiting for a new batch.
I signed up for a finished board a short while ago and received a V6 board yesterday
Is this analyzer compatible with PulseView?
You can export to CSV and then import
@@HappyLittleDiodes I meant directly from PulseView without using your software?
This might be common knowledge, but is there a similar adc version of the software?
You mean can it measure analogue? If that's the question, no it can't
@@HappyLittleDiodes well i guess it could read a few adc's :D
Those FF data are from keyboard scanning I think.
How does this compare to the much more expensive Saleae Logic Pro 16?
Sadly I don't have one, but I'm sure the Saleae is very capable and robust, for professional applications it's probably a good choice
Muy interesante !!!! 👏👏👏👏👏👏👏
YES!!!!!
Genius
A competitor to @Saleae perhaps
Is the software sigrok itself or a cousin ?
The software imports the sigrok protocols, it's been put together by the project creator themself
Como eu gostaria de entender tudo isto, veja esta placa pode medir até 400MHZ, por exemplo se eu utilizaar placa Teensy 4.1 que opera até 600MHZ será que ao invés de usar Pico poderia usar placa teensy 4.1 assim poderia medir até 600MHZ.... eu poderia utilizar uma placa desta para montar o meu próprio osciloscópio? Eu precisaria entender como usar este tipo de placa por exemplo em um sistema de elétrica/eletrônica para a minha CNC.....
Is there no trace length correction needed on your own pcb?
I don't think it's important for the relatively low frequencies we're dealing with on the ZX Spectrum (3.5 MHz), but I'm happy to be corrected on that!
The traces inside the Spectrum itself will not be length corrected, and there are multiple Spectrums with different trace lengths (would need a different design for each Specy board). Luckily, the Spectrum runs at such a slow clock rate that it's not a requirement anyway.
@@HappyLittleDiodes You are right. I didn't think of the low frequency of the spectrum. 🙃
I like your videos
Does it accept external clock signal?
I don't think so at the moment but I believe it's being discussed
RP2350 itself ought to happily run its PLLs from 10MHz input reference... pico boards are hard-wired to a crystal though, and the other clock inputs cannot drive the PLLs, only the clock mux itself. I believe the result is this is trivial with a custom board, and impossible for an unmodified pico.
Addendum: if you're sampling ~10x or higher above the external clock, you're getting all the relevant edges, if by 128x or more you have 7 whole bits of phase information about the rising and falling edge of every bit. You can sample an external clock using your own free-running clock, and reference signals to it in software if your input clock is under ~8MHz itself.
You should add some more ground vias near where signals enter and exit the board, also near splits/borders of the groundplane. Connecting the ground plane in way that DC can flow is not the same thing as ensuring high frequency signal integrity. It will also improve signal integrity to add some ground-carrying pins in between your signal pins in the connector, high frequency signals always need a low impedance return path, otherwise you'll be severely limited in bandwidth. A 400 MHz squarewave has harmonics well into the Gigahertz range, you'll need to improve the grounding to be able make use of the highest sample rates this board offers.
I highly recommend this video on the effect of ground plane stitching: th-cam.com/video/nPx2iqmVAHY/w-d-xo.html
Are you referring to the design of the logic analyser PCB? Or the interface PCB? If you have insights into the LA PCB design then I'm sure the designer would be interested
@@HappyLittleDiodes I'm referring to your interface PCB design, shown at the end of your video. I haven't looked at the LA layout yet.
@vatterger thanks! I'll take a look at the video, thanks for the tips
Why have a custom board then use a pico why not add the chip on
I could do that for my ZX Spectrum purposes, it would then be much less flexible though as I could only use it for those machines via the edge connector
@@HappyLittleDiodes however in this design putting the pico components on the board changes nothing
400M samples/s BUT divided by the number of channels! So keep that in mind.
Yes absolutely
🥰🥰🥰
nice
👍👍
You should update the video title to specify 128 channels because 24 channels is nothing particularly special. But 128 that's very unique special!
I included it in the thumbnail, I felt that if I waved this single device around saying it can do 120 channels it's not totally accurate, since you need 5 of them to achieve that
I thought the thumbnail was a NES cartridge X)
That must have been disappointing!
Nah it was just at a glance. After I took a double take I saw it wasn't
Looks like a cool and useful project though
Very nice project, way better than the cheap Saleae clone I've bought probably a decade ago.
Coud you run that in Rasbry pi 5 instead of pico?
I'm not sure!
No. The pico has some hardware bits that get used to reach the high frequency aquisition. Pi5 would be slow.
🎈
🌈
Not sure why it takes 6 versions to have everything on a single pcb
400mhz?????? What!!!