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Your Appreciations, care and share matters a lot to me. #EnginneringLove. Let me give the details of few exciting features of Engineering Funda: 1. A link to more than 30 Courses is given in the Comment Section. 2. Detailed Syllabus of the subject along with chapters is given in the description of videos.
Thanks for the informative video. I had an query, at 5:15 if D is on, that doesn't mean clk should be on right?- in precharge input clk is 0 so nmos is off--- meaning c4 comes into play. Correct me, if i am wrong anywhere
Your Appreciations, care and share matters a lot to me. #EnginneringLove. All the subjects playlist of Engineering Funda is available in comment section. Share it with your friends to support us. Your positive comments motivates me and person like me get boosted by my students feedback. Thanks and welcome 🙏
Hi sir, Do you have anything on the CMOS sizing? I didn't find anything on this topic, Do you have it only for premium subscribers? If yes how to join? thank you
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Thank you sir. You're helping me a lot. I pray for yr good🤲🏼
God bless you dear 🙏
Perfect explanation 👍👍
Your positive comments motivates me, Thanks and welcome 🙏
5:21 not explained properly.
Thank you sir 🙏
Most welcome
very informative
Your Appreciations, care and share matters a lot to me. #EnginneringLove.
All the subjects playlist of Engineering Funda is available in comment section. Share it with your friends to support us.
Your positive comments motivates me and person like me get boosted by my students feedback. Thanks and welcome 🙏
thanks man, very good video
Your Appreciations, care and share matters a lot to me. #EnginneringLove.
Let me give the details of few exiting features of Engineering Funda:
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2. Detailed Syllabus of subject along with chapters is given description of videos.
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thanks sir
Your Appreciations, care and share matters a lot to me. #EnginneringLove.
Let me give the details of few exciting features of Engineering Funda:
1. A link to more than 30 Courses is given in the Comment Section.
2. Detailed Syllabus of the subject along with chapters is given in the description of videos.
can you please make a video on ratioed logic and how it affects the noise margin
Thanks for the informative video. I had an query, at 5:15 if D is on, that doesn't mean clk should be on right?- in precharge input clk is 0 so nmos is off--- meaning c4 comes into play. Correct me, if i am wrong anywhere
See it again, it is explained perfectly correct here
@@EngineeringFunda ,charge sharing can be overcome, if we make sure that the input remains stable for a precharge/evaluation phase, is that right?
Maza aa gya
Your Appreciations, care and share matters a lot to me. #EnginneringLove.
All the subjects playlist of Engineering Funda is available in comment section. Share it with your friends to support us.
Your positive comments motivates me and person like me get boosted by my students feedback. Thanks and welcome 🙏
Hi sir, Do you have anything on the CMOS sizing? I didn't find anything on this topic, Do you have it only for premium subscribers? If yes how to join? thank you
In upgradation of subject, I will make sure to add it.
Sir using zipper CMOS MAY BE another solution to it as it has different gated clocks
the second solution will take more time to charge all capacitor instead of charging a single capacitor. Correct me if m wrong
Charging and discharging will take more time, so it will minimize operational speed of integrated circuit
Nice sir
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sir ,can you provide its notes in the form of pdf ?