Domino Logic CMOS (Basics, Circuit, Number of Transistors & Working) Explained

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  • เผยแพร่เมื่อ 19 ธ.ค. 2024

ความคิดเห็น • 91

  • @EngineeringFunda
    @EngineeringFunda  ปีที่แล้ว

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  • @pkb8517
    @pkb8517 4 ปีที่แล้ว +65

    PDN is made up by nmos
    So PUN is for pmos

  • @fasnamfd
    @fasnamfd ปีที่แล้ว +2

    very usefulll video .Thank you sir

    • @EngineeringFunda
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  • @muhammadmuzamilmir4550
    @muhammadmuzamilmir4550 4 ปีที่แล้ว +10

    Thanks sir.. very great someone has started teaching this difficult subject.. will follow all .. thanks once again.. watched ur video ..basic concepts are good❤️

    • @EngineeringFunda
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  • @lailazannat5989
    @lailazannat5989 5 หลายเดือนก่อน +1

    you are such an excellent teacher!

    • @EngineeringFunda
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  • @Reachexamcentre
    @Reachexamcentre 4 ปีที่แล้ว +7

    Nice explanation sir.Thank you so much.From the name of Domino logic we can easily said the Domino's Pizza...

  • @manojreddy3127
    @manojreddy3127 3 ปีที่แล้ว +2

    Very ease of explaining thanks for the video

    • @EngineeringFunda
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  • @gethss
    @gethss 2 ปีที่แล้ว +2

    So much helpful tahnk you sir

    • @EngineeringFunda
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  • @robindethienne4253
    @robindethienne4253 4 ปีที่แล้ว +3

    Nice video, thx for the explanation,
    from Belgium ;)

    • @EngineeringFunda
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  • @padmavathin6879
    @padmavathin6879 3 ปีที่แล้ว +2

    Well explained sir. Your video helps students a lot

    • @EngineeringFunda
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  • @EngineeringFunda
    @EngineeringFunda  3 ปีที่แล้ว +23

    PUN (Pull Up Network) made up of pMOS.

    • @alloc7260
      @alloc7260 3 ปีที่แล้ว

      હવે બરોબર

    • @nimitgarg2531
      @nimitgarg2531 2 ปีที่แล้ว +1

      Yes

    • @vivekreddy8765
      @vivekreddy8765 2 ปีที่แล้ว +2

      Thank you sir for 1 min I got mad and searching for your previous lectures

  • @praneethch1908
    @praneethch1908 3 ปีที่แล้ว +2

    Perfectly explained Sir

    • @EngineeringFunda
      @EngineeringFunda  3 ปีที่แล้ว +1

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  • @Asifur_Rahman
    @Asifur_Rahman 2 หลายเดือนก่อน

    Thanks a lot sir for the videos of VLSI

    • @EngineeringFunda
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  • @newhope5729
    @newhope5729 2 ปีที่แล้ว +2

    Thank you so very much😇🙏

    • @EngineeringFunda
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      @newhope5729 2 ปีที่แล้ว +1

      @@EngineeringFunda Yup I'm sharing them..... They're good 👍

  • @deathreap1014
    @deathreap1014 2 ปีที่แล้ว +1

    Well explained sir thank you

    • @EngineeringFunda
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  • @shrutisingh5356
    @shrutisingh5356 3 ปีที่แล้ว +3

    Good explain 😊

    • @EngineeringFunda
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  • @taukirali1148
    @taukirali1148 2 ปีที่แล้ว +1

    Bhot acha laga sir

  • @sanjanakataru1086
    @sanjanakataru1086 2 ปีที่แล้ว +6

    WHEN clk=1 and and input=0 , why did you take output as zero, bcoz when clk=1 and input=0 both pmos and nmos are off right ? how did you get the voltage before inverter as VDD, can someone please tell this ?

  • @jbkrobin
    @jbkrobin ปีที่แล้ว +2

    10:58 How x1 will be in Vdd stage if pmos is off? x1 should be 0 here and after inversion it should be 1. So, output 1 would be 1. Right?

    • @vinayanpa126
      @vinayanpa126 ปีที่แล้ว

      it got charged before that cycle

    • @jbkrobin
      @jbkrobin ปีที่แล้ว

      @@vinayanpa126 Semester passed. But thanks. I will check later if needed.
      😅

  • @soniyakumari2870
    @soniyakumari2870 3 ปีที่แล้ว +2

    Really nice👍

    • @EngineeringFunda
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  • @pritikhanpara222
    @pritikhanpara222 4 ปีที่แล้ว +4

    Perfect 👍👍

    • @EngineeringFunda
      @EngineeringFunda  4 ปีที่แล้ว

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  • @gyanjyotidas1451
    @gyanjyotidas1451 7 หลายเดือนก่อน +1

    Thank You Sir❤❤

    • @EngineeringFunda
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  • @susheelapatgar3640
    @susheelapatgar3640 2 ปีที่แล้ว +1

    Thank you sir 🙏❤️

    • @EngineeringFunda
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  • @taukirali1148
    @taukirali1148 2 ปีที่แล้ว

    Thanks sir...you're very helpful ❤️

    • @EngineeringFunda
      @EngineeringFunda  2 ปีที่แล้ว

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  • @lakshyagupta4211
    @lakshyagupta4211 2 ปีที่แล้ว +1

    Huge fan sir, thank you for this playlist 😍😍

    • @EngineeringFunda
      @EngineeringFunda  2 ปีที่แล้ว +1

      Your positive comments motivates me.
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    • @lakshyagupta4211
      @lakshyagupta4211 2 ปีที่แล้ว

      Sir kindly make a video on DRC rules as I am having my paper on 3 March so it will be a huge help.

  • @zahidabedin4268
    @zahidabedin4268 4 ปีที่แล้ว +1

    Nice explanation

    • @EngineeringFunda
      @EngineeringFunda  4 ปีที่แล้ว

      Your positive comments motivates me, Thanks and welcome 🙏

  • @melamraghava6538
    @melamraghava6538 2 ปีที่แล้ว +1

    Thank you 😌

    • @EngineeringFunda
      @EngineeringFunda  2 ปีที่แล้ว

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  • @vivekKumar-o7i5n
    @vivekKumar-o7i5n 6 หลายเดือนก่อน

    PDN is made up with nmos sir time -> 0:26 / 12:19

  • @TechLoveMe
    @TechLoveMe 3 ปีที่แล้ว +1

    Sorry to correct you, but there is wrong you explain in 1st definition " In static we use PDN by now not by pmos so correct it. I like your videos by heart,

    • @EngineeringFunda
      @EngineeringFunda  3 ปีที่แล้ว +1

      Pull down network is made up of nMOS. And pull up Network is made of pMOS.

    • @EngineeringFunda
      @EngineeringFunda  3 ปีที่แล้ว

      By mistake I have wrote PDN, it should be PUN.

  • @sammikumar3474
    @sammikumar3474 2 หลายเดือนก่อน

    In video you explain about casacading effect of cmos you take input 0 0 and then 1 1 but reverse in this video why?

  • @nileshpandey4859
    @nileshpandey4859 หลายเดือนก่อน

    sir please make video on tspc logic in dynamic cmos

  • @shubhamharale16
    @shubhamharale16 15 วันที่ผ่านมา +1

    Thanks dada

    • @EngineeringFunda
      @EngineeringFunda  15 วันที่ผ่านมา

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  • @pemmakavijaykumarreddy5852
    @pemmakavijaykumarreddy5852 2 ปีที่แล้ว +1

    sir does the capacitors are actually present in above domino cmos
    at 11.19 how the output 2 is 0. i think it would be 1
    and i have 1 doubts regarding chargings and dischargings

    • @EngineeringFunda
      @EngineeringFunda  2 ปีที่แล้ว

      It is not fabricated, it is happening due to circuits.

  • @alabamaroaster1086
    @alabamaroaster1086 3 ปีที่แล้ว +1

    in the case of CLK 0 and INPUT 1 had the output 1 and 2 as 0 logic.. shouldn't X1 be in 0 state and then inverted and charged up to Vdd for the case of CLK 1 and INPUT 0, for X1.

  • @saranyathanukkodi7674
    @saranyathanukkodi7674 4 ปีที่แล้ว +1

    Sir when we will use pseudo nmos
    Whether this order is correct aa sir
    Cmos
    Pseudo nmos
    Static cmos
    Dynamic cmos
    Domino cmos

  • @Diverse_insights-1
    @Diverse_insights-1 4 หลายเดือนก่อน

    Design 8 input MUX using two 4 input MUX in Domino logic and explain. Sir how to solve this one?

  • @hampaa13565
    @hampaa13565 ปีที่แล้ว

    0:25 PUM-> nmos

  • @aniketmodi5509
    @aniketmodi5509 ปีที่แล้ว

    Sir can you please share your notes which you made in videos

    • @EngineeringFunda
      @EngineeringFunda  ปีที่แล้ว

      It can be accessed from my Android Application Engineering Funda

  • @yalemlake4783
    @yalemlake4783 ปีที่แล้ว +3

    PDN is not made up of Pmos rather it made up of nmos

    • @amirphilip2234
      @amirphilip2234 หลายเดือนก่อน

      @@yalemlake4783 Exactly 💯

  • @abdurrahmanmolla1015
    @abdurrahmanmolla1015 3 ปีที่แล้ว

    If have a input 1010 how to saw the output?

  • @taukirali1148
    @taukirali1148 2 ปีที่แล้ว

    Sir, can you please tell me how to overcome the problem of Race in domino CMOS ?

    • @taukirali1148
      @taukirali1148 2 ปีที่แล้ว

      You've not uploaded any video regarding tht..if you've pls help me.

    • @msaathreya266
      @msaathreya266 2 ปีที่แล้ว

      @@taukirali1148 nora

  • @rancho4512
    @rancho4512 2 หลายเดือนก่อน

    Bhai tujhe pta ky pdha rha bol rha

  • @mittalkalal3708
    @mittalkalal3708 ปีที่แล้ว +1

    This is buffer

  • @UECAshutoshKumar
    @UECAshutoshKumar 7 หลายเดือนก่อน +2

    Thank you sir 🙏